Towards a global solution to high level synthesis problems

Authors:
Abdelhakim Safir;Bertrand Zavidovique
Affiliations:
Etablissement Technique Central de l'Armement/CREA/SP 16 bis, Avenue Prieur de la Côte d'Or 94114 Arcueil Cedex FRANCE;Institut d'Electronique Fondamental. Bat 220. Faculté d'ORSAY Université de PARIS-SUD 91405 ORSAY FRANCE
Venue:
EURO-DAC '90 Proceedings of the conference on European design automation
Year:
1990

Citing 5
Cited 2

Force-directed scheduling in automatic data path synthesis

DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Performance of a new annealing schedule

DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Tutorial on high-level synthesis

DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Module selection for pipelined synthesis

DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
VLSI and Modern Signal Processing

VLSI and Modern Signal Processing

Speeding-up heuristic allocation, scheduling and binding with SAT-based abstraction/refinement techniques

ACM Transactions on Design Automation of Electronic Systems (TODAES)
Simultaneous scheduling, allocation, binding, re-ordering, and encoding for crosstalk pattern minimization during high-level synthesis

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Quantified Score

Hi-index	0.00

Visualization

Abstract

Since the various tasks as scheduling, operator allocation and module selection involved in the high level synthesis are strongly interdependent, a global solution to the high level synthesis problems becomes necessary. Therefore, a global optimization process which simultaneously performs scheduling, operators allocation and module selection, is presented in this paper. The search for a good solution in a "realistic enough" design space is made possible thanks to a global optimization algorithm which is simulated-annealing-based and improved by a pseudo-deterministic control. In the absence of other challenging global methods for both scheduling-operator allocation and module selection, the proposed global optimization algorithm is compared to a regular simulated annealing. Experimental results are shown in this paper and highlight a significant speed-up over a regular simulated annealing.- ranging from 45% to 73% on medium size problems (for instance the fifth order elliptic digital wave filter).- ranging from 82% to 235% on small size problems (the radix-2 FFT example (pipelined architecture)).- A much more complex example (from line-detection algorithm of [Danielson]) is briefly exposed and used to test the "capability" of the proposed method for processing such level of complexity.