Iterative improvement based multi-way netlist partitioning for FPGAs

Multiple-Way Network Partitioning

IEEE Transactions on Computers

Cost minimization of partitions into multiple devices

DAC '93 Proceedings of the 30th international Design Automation Conference

Multi-way netlist partitioning into heterogeneous FPGAs and minimization of total device cost and interconnect

DAC '94 Proceedings of the 31st annual Design Automation Conference

Circuit partitioning for huge logic emulation systems

DAC '94 Proceedings of the 31st annual Design Automation Conference

A unified cost model for min-cut partitioning with replication applied to optimization of large heterogeneous FPGA partitions

EURO-DAC '94 Proceedings of the conference on European design automation

Multi-way system partitioning into a single type or multiple types of FPGAs

FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays

PROP: a recursive paradigm for area-efficient and performance oriented partitioning of large FPGA netlists

ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design

Partitioning with cone structures

ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design

Adaptive methods for netlist partitioning

ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design

A linear-time heuristic for improving network partitions

DAC '82 Proceedings of the 19th Design Automation Conference

An evaluation of bipartitioning techniques

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

On implementation choices for iterative improvement partitioning algorithms

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Network-flow-based multiway partitioning with area and pin constraints

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Optimization by iterative improvement: an experimental evaluation on two-way partitioning

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems