Hierarchical Partitioning in a Rapid Prototyping Environment

  • Authors:
  • Ulrike Ober;Juergen Herpel

  • Affiliations:
  • -;-

  • Venue:
  • RSP '96 Proceedings of the 7th IEEE International Workshop on Rapid System Prototyping (RSP '96)
  • Year:
  • 1996

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Abstract

Rapid prototyping is a well accepted method in microsystems technology. During early design phases a design can be checked against its requirements and, using FPGAs, we are able to easily implement changes and correct faults. The emulation board of the design environment, called MCEMS (Methodology for the Conceptual design of Embedded Microelectronic Systems), is assembled by FPGAs. To map an application specific embedded controller to this emulation board, the netlist has to be partitioned. None of the existing partitioning strategies are suitable for this system. In this paper we present a hierarchical partitioning approach that satisfies the requirements of this special application.