Recent directions in netlist partitioning: a survey
Integration, the VLSI Journal
Hardware/Software Partitioning using Integer Programming
EDTC '96 Proceedings of the 1996 European conference on Design and Test
A linear-time heuristic for improving network partitions
DAC '82 Proceedings of the 19th Design Automation Conference
An approach to the adaptation of estimated cost parameters in the COSYMA system
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
CASTLE: an interactive environment for HW-SW Co-Design
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
A method for area estimation of data-path in high level synthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
The heterogeneous structure problem in hardware/software codesign: a macroscopic approach
DATE '99 Proceedings of the conference on Design, automation and test in Europe
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
| Hi-index | 0.00 |
This paper describes a method to estimate the implementation cost of the hardware part in a mixed hardware/software system, as well as the related performance. These estimations try to avoid the use of many implementation details in order to keep the complexity order of the process under control. The concepts of hardware sharing and parallelism are exploited to make a picture of the whole hardware cost associated to a given partition.