Synthesis and simulation of digital systems containing interacting hardware and software components
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
OSCAR: optimum simultaneous scheduling, allocation and resource binding based on integer programming
EURO-DAC '94 Proceedings of the conference on European design automation
A binary-constraint search algorithm for minimizing hardware during hardware/software partitioning
EURO-DAC '94 Proceedings of the conference on European design automation
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
The extended partitioning problem: hardware/software mapping and implementation-bin selection
RSP '95 Proceedings of the Sixth IEEE International Workshop on Rapid System Prototyping (RSP'95)
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
An approach to the adaptation of estimated cost parameters in the COSYMA system
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Partitioning of VLSI circuits and systems
DAC '96 Proceedings of the 33rd annual Design Automation Conference
MILP based task mapping for heterogeneous multiprocessor systems
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Reducing the complexity of ILP formulations for synthesis
ISSS '97 Proceedings of the 10th international symposium on System synthesis
A hardware/software partitioner using a dynamically determined granularity
DAC '97 Proceedings of the 34th annual Design Automation Conference
A tool for partitioning and pipelined scheduling of hardware-software systems
Proceedings of the 11th international symposium on System synthesis
System-level partitioning with uncertainty
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
The heterogeneous structure problem in hardware/software codesign: a macroscopic approach
DATE '99 Proceedings of the conference on Design, automation and test in Europe
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Journal of VLSI Signal Processing Systems - Special issue on VLSI on custom computing technology
Proceedings of the conference on Design, automation and test in Europe
Optimal temporal partitioning and synthesis for reconfigurable architectures
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the ninth international symposium on Hardware/software codesign
On-line fault detection in a hardware/software co-design environment: system partitioning
Proceedings of the 14th international symposium on Systems synthesis
Hardware-Software partitioning and pipelined scheduling of transformative applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Exploiting intellectual properties with imprecise design costs for system-on-chip synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
HW/SW codesign techniques for dynamically reconfigurable architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
On the hardware-software partitioning problem: System modeling and partitioning techniques
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Hardware/Software Partitioning with Iterative Improvement Heuristics
ISSS '96 Proceedings of the 9th international symposium on System synthesis
Resource mapping and scheduling for heterogeneous network processor systems
Proceedings of the 2005 ACM symposium on Architecture for networking and communications systems
Hardware/software partitioning for platform-based design method
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Low-complex dynamic programming algorithm for hardware/software partitioning
Information Processing Letters
Algorithmic aspects of area-efficient hardware/software partitioning
The Journal of Supercomputing
The Instruction-Set Extension Problem: A Survey
ARC '08 Proceedings of the 4th international workshop on Reconfigurable Computing: Architectures, Tools and Applications
Algorithmic aspects for power-efficient hardware/software partitioning
Mathematics and Computers in Simulation
A Framework for Task Scheduling and Memory Partitioning for Multi-Processor System-on-Chip
HiPEAC '09 Proceedings of the 4th International Conference on High Performance Embedded Architectures and Compilers
New model and algorithm for hardware/software partitioning
Journal of Computer Science and Technology
Hardware-software co-synthesis of hard real-time systems with reconfigurable FPGAs
Computers and Electrical Engineering
Modern development methods and tools for embedded reconfigurable systems: A survey
Integration, the VLSI Journal
Low-complex dynamic programming algorithm for hardware/software partitioning
Information Processing Letters
Pipelining-based tradeoffs for hardware/software codesign of multimedia systems
EURO-PDP'00 Proceedings of the 8th Euromicro conference on Parallel and distributed processing
The Instruction-Set Extension Problem: A Survey
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Use dynamic combination of two meta-heuristics to do bi-partitioning
ICESS'04 Proceedings of the First international conference on Embedded Software and Systems
Solving partitioning problem in codesign with ant colonies
IWINAC'05 Proceedings of the First international work-conference on the Interplay Between Natural and Artificial Computation conference on Artificial Intelligence and Knowledge Engineering Applications: a bioinspired approach - Volume Part II
Minimizing power in hardware/software partitioning
ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
An optimization methodology for memory allocation and task scheduling in socs via linear programming
SAMOS'06 Proceedings of the 6th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Efficient heuristic algorithms for path-based hardware/software partitioning
Mathematical and Computer Modelling: An International Journal
Robust Software Partitioning with Multiple Instantiation
INFORMS Journal on Computing
ICA3PP'12 Proceedings of the 12th international conference on Algorithms and Architectures for Parallel Processing - Volume Part I
Integration of Dataflow-Based Heterogeneous Multiprocessor Scheduling Techniques in GNU Radio
Journal of Signal Processing Systems
Efficient heuristic and tabu search for hardware/software partitioning
The Journal of Supercomputing
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One of the key problems in hardware/software codesign is hardware/software partitioning. This paper describes a new approach to hardware/software partitioning using integer programming (IP). The advantage of using IP is that optimal results are calculated respective to the chosen objective function. The partitioning approach works fully automatic and supports multi-processor systems, interfacing and hardware sharing. In contrast to other approaches where special estimators are used, we use compilation and synthesis tools for cost estimation. The increased time for calculating the cost metrics is compensated by an improved quality of the estimations compared to the results of estimators. Therefore, fewer iteration steps of partitioning will be needed. The paper will show that using integer programming to solve the hardware/software partitioning problem is feasible and leads to promising results.