An automated temporal partitioning and loop fission approach for FPGA based reconfigurable synthesis of DSP applications

  • Authors:
  • Meenakshi Kaul;Ranga Vemuri;Sriram Govindarajan;Iyad Ouaiss

  • Affiliations:
  • Digital Design Environments Laboratory, University of Cincinnati, Cincinnati, OH;Digital Design Environments Laboratory, University of Cincinnati, Cincinnati, OH;Digital Design Environments Laboratory, University of Cincinnati, Cincinnati, OH;Digital Design Environments Laboratory, University of Cincinnati, Cincinnati, OH

  • Venue:
  • Proceedings of the 36th annual ACM/IEEE Design Automation Conference
  • Year:
  • 1999

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Abstract