Advanced compiler design and implementation
Advanced compiler design and implementation
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A decade of reconfigurable computing: a visionary retrospective
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Computer
Architecture Design of Reconfigurable Pipelined Datapaths
ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
NAPA C: Compiling for a Hybrid RISC/FPGA Architecture
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
PACT XPP—A Self-Reconfigurable Data Processing Architecture
The Journal of Supercomputing
Novel Algorithm Combining Temporal Partitioning and Sharing of Functional Units
FCCM '01 Proceedings of the the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
PACT XPP—A Self-Reconfigurable Data Processing Architecture
The Journal of Supercomputing
From C Programs to the Configure-Execute Model
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Dynamic loop pipelining in data-driven architectures
Proceedings of the 2nd conference on Computing frontiers
The Journal of Supercomputing
Optimized mapping for enchancing the operation parallelism in coarse-grained reconfigurable arrays
SMO'06 Proceedings of the 6th WSEAS International Conference on Simulation, Modelling and Optimization
Resource aware mapping on coarse grained reconfigurable arrays
Microprocessors & Microsystems
Compiler assisted architectural exploration framework for coarse grained reconfigurable arrays
The Journal of Supercomputing
Modern development methods and tools for embedded reconfigurable systems: A survey
Integration, the VLSI Journal
Compiling for reconfigurable computing: A survey
ACM Computing Surveys (CSUR)
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Data-driven regular reconfigurable arrays: design space exploration and mapping
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
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The eXtreme Processing Platform (XPP) is a unique reconfigurable computing (RC) architecture supported by a complete set of design tools. This paper presents the XPP Vectorizing C Compiler XPP-VC, the first high-level compiler for this architecture. It uses new mapping techniques, combined with efficient vectorization. A temporal partitioning phase guarantees the compilation of programs with unlimited complexity, provided that only the supported C subset is used. A new loop partitioning scheme permits to map large loops of any kind. It is not constrained by loop dependences or nesting levels. To our knowledge, the compilation performance is unmatched by any other compiler for RC. Preliminary evaluations show compilation times of only a few seconds from C code to configuration binaries and performance speedups over standard microprocessor implementations. The overall technology represents a significant step toward RC architectures which are faster and simpler to program.