Multiloop parallelisation using unrolling and fission

Authors:
Yuet Ming Lam;José Gabriel F. Coutinho;Chun Hok Ho;Philip Heng Wai Leong;Wayne Luk
Affiliations:
Faculty of Information Technology, Macau University of Science and Technology, Taipa, Macau, China;Department of Computing, Imperial College London, London, UK;Department of Computing, Imperial College London, London, UK;School of Electrical and Information Engineering, University of Sydney, Sydney, NSW, Australia;Department of Computing, Imperial College London, London, UK
Venue:
International Journal of Reconfigurable Computing - Special issue on selected papers from spl 2009 programmable logic and applications
Year:
2010

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Abstract

A technique for parallelising multiple loops in a heterogeneous computing system is presented. Loops are first unrolled and then broken up intomultiple tasks which are mapped to reconfigurable hardware. A performance-driven optimisation is applied to find the best unrolling factor for each loop under hardware size constraints. The approach is demonstrated using three applications: speech recognition, image processing, and the N-Body problem. Experimental results show that a maximum speedup of 34 is achieved on a 274MHz FPGA for the N-Body over a 2.6GHz microprocessor, which is 4.1 times higher than that of an approach without unrolling.