SUIF: an infrastructure for research on parallelizing and optimizing compilers
ACM SIGPLAN Notices
Configuration prefetch for single context reconfigurable coprocessors
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Space-time scheduling of instruction-level parallelism on a raw machine
Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
Kernel scheduling in reconfigurable computing
DATE '99 Proceedings of the conference on Design, automation and test in Europe
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Optimal temporal partitioning and synthesis for reconfigurable architectures
Proceedings of the conference on Design, automation and test in Europe
DEFACTO: A Design Environment for Adaptive Computing Technology
Proceedings of the 11 IPPS/SPDP'99 Workshops Held in Conjunction with the 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing
Instruction-Level Parallelism for Reconfigurable Computing
FPL '98 Proceedings of the 8th International Workshop on Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm
New CAD Framework Extends Simulation of Dynamically Reconfigurable Logic
FPL '98 Proceedings of the 8th International Workshop on Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm
RACE: Reconfigurable and Adaptive Computing Environment
FPL '96 Proceedings of the 6th International Workshop on Field-Programmable Logic, Smart Applications, New Paradigms and Compilers
Architectural Synthesis Techniques for Dynamically Reconfigurable Logic
FPL '96 Proceedings of the 6th International Workshop on Field-Programmable Logic, Smart Applications, New Paradigms and Compilers
Garp: a MIPS processor with a reconfigurable coprocessor
FCCM '97 Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines
Compilation tools for run-time reconfigurable designs
FCCM '97 Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines
Temporal Partitioning and Scheduling for Reconfigurable Computing
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
An Effective Design System for Dynamically Reconfigurable Architectures
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
NAPA C: Compiling for a Hybrid RISC/FPGA Architecture
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
A Framework for Scheduling and Context Allocation in Reconfigurable Computing
Proceedings of the 12th international symposium on System synthesis
A run-time word-level reconfigurable coarse-grain functional unit for a VLIW processor
Proceedings of the 15th international symposium on System Synthesis
System synthesis of synchronous multimedia applications
ACM Transactions on Embedded Computing Systems (TECS)
High-Level Partitioning of Digital Systems Based on Dynamically Reconfigurable Devices
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Cyclic coding algorithms under MorphoSys reconfigurable computing system
Advances in Engineering Software
Realization of wireless multimedia communication systems on reconfigurable platforms
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable systems
An optimal algorithm for minimizing run-time reconfiguration delay
ACM Transactions on Embedded Computing Systems (TECS)
Power-performance trade-offs for reconfigurable computing
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
From C Programs to the Configure-Execute Model
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
A Design Methodology for Dynamic Reconfiguration: The Caronte Architecture
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3 - Volume 04
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Mapping data-parallel tasks onto partially reconfigurable hybrid processor architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A model-based extensible framework for efficient application design using FPGA
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Static scheduling techniques for dependent tasks on dynamically reconfigurable devices
Journal of Systems Architecture: the EUROMICRO Journal
A reconfigurable platform for multi-service edge routers
Proceedings of the 20th annual conference on Integrated circuits and systems design
A novel SoC design methodology combining adaptive software and reconfigurable hardware
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
The shining embedded system design methodology based on self dynamic reconfigurable architectures
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
An incremental temporal partitioning method for real-time reconfigurable systems
EHAC'06 Proceedings of the 5th WSEAS International Conference on Electronics, Hardware, Wireless and Optical Communications
Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
Journal of Signal Processing Systems
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Modern development methods and tools for embedded reconfigurable systems: A survey
Integration, the VLSI Journal
Maximum edge matching for reconfigurable computing
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
System-level power-performance tradeoffs for reconfigurable computing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Dynamically reconfigurable architectures are emerging as a viable design alternative to implement a wide range of computationally intensive applications. At the same time, an urgent necessity has arisen for support tool development to automate the design process and achieve optimal exploitation of the architectural features of the system. Task scheduling and context (configuration) management become very critical issues in achieving the high performance that ditgital signal processing (DSP) and multimedia applications demand. This article proposes a strategy to automate the design process which considers all possible optimizations that can be carried out at compilation time, regarding context and data transfers. This strategy is general in nature and could be applied to different reconfigurable systems. We also discuss the key aspects of the scheduling problem in a reconfigurable architecture such as MorphoSys. In particular, we focus on a task scheduling methodlolgy for DSP and multimedia applications, as well as the context management and scheduling optimizations.