Incremental hardware estimation during hardware/software functional partitioning
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Closeness metrics for system-level functional partitioning
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
CORDS: hardware-software co-synthesis of reconfigurable real-time distributed embedded systems
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Hardware-software co-design of embedded reconfigurable architectures
Proceedings of the 37th Annual Design Automation Conference
Adaptive functional programming
POPL '02 Proceedings of the 29th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
A framework for reconfigurable computing: task scheduling and context management
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
POPL '03 Proceedings of the 30th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Hardware-Software Cosynthesis for Digital Systems
IEEE Design & Test
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
HW/SW codesign techniques for dynamically reconfigurable architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Dynamizing static algorithms, with applications to dynamic trees and history independence
SODA '04 Proceedings of the fifteenth annual ACM-SIAM symposium on Discrete algorithms
Proceedings of the 42nd annual Design Automation Conference
Self-adjusting computation
Accurate motion detection and sawtooth artifacts remove video processing engine for LCD TV
IEEE Transactions on Consumer Electronics
Imperative self-adjusting computation
Proceedings of the 35th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Modern development methods and tools for embedded reconfigurable systems: A survey
Integration, the VLSI Journal
The q2 profiling framework: driving application mapping for heterogeneous reconfigurable platforms
ARC'12 Proceedings of the 8th international conference on Reconfigurable Computing: architectures, tools and applications
Communication-aware HW/SW co-design for heterogeneous multicore platforms
Proceedings of the 2012 Workshop on Dynamic Analysis
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Reconfigurable hardware is becoming a prominent component in a large variety of SoC designs. Reconfigurability allows for efficient hardware acceleration and virtually unlimited adaptability. On the other hand, overheads associated with reconfiguration and interfaces with the software component need to be evaluated carefully during the exploration phase. The aim of this paper is to identify the best trade-off considering application-specific features in software, which can lend itself to software-based acceleration and lead to a revision of the view that certain computationally intensive tasks can only be accelerated through hardware. In order to validate the effectiveness of our proposed techniques, we built an extensive development and experimental setup, bringing together the MLTon-based programming environment and physical mapping of the software and hardware onto a real dynamically reconfigurable SoC system.