Kernel scheduling in reconfigurable computing
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
MorphoSys: case study of a reconfigurable computing system targeting multimedia applications
Proceedings of the 37th Annual Design Automation Conference
Journal of VLSI Signal Processing Systems - Special issue on VLSI on custom computing technology
ISSS '00 Proceedings of the 13th international symposium on System synthesis
A framework for reconfigurable computing: task scheduling and context management
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
The first real operating system for reconfigurable computers
ACSAC '01 Proceedings of the 6th Australasian conference on Computer systems architecture
Automated design synthesis and partitioning for adaptive reconfigurable hardware
Hardware implementation of intelligent systems
Handling FPGA Faults and Configuration Sequencing Using a Hardware Extension
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
A Framework for Scheduling and Context Allocation in Reconfigurable Computing
Proceedings of the 12th international symposium on System synthesis
A multi-mode video-stream processor with cyclically reconfigurable architecture
Proceedings of the 5th conference on Computing frontiers
Applying dynamic reconfiguration for fault tolerance in fine-grained logic arrays
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Modern development methods and tools for embedded reconfigurable systems: A survey
Integration, the VLSI Journal
CASES '10 Proceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems
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FPGA based custom computing machine applications have grown tremendously. Reconfigurable FPGAs incur very less reconfiguration times and also have the ability to reconfigure partially. They provide avenues to reuse the hardware resources at runtime, thus decreasing the hardware costs. In this research, we present algorithms for temporal partitioning of applications into small size segments(under the area constraints), and scheduling of segments to ensure proper execution by satisfying the data dependencies among the segments. Our investigation concentrates on applications that are also directed acyclic graphs (DAGs). We have implemented the algorithms and have produced mappings of real applications on reconfigurable hardware.