Low Energy Data Management for Different On-Chip Memory Levels in Multi-Context Reconfigurable Architectures

Authors:
M. Sanchez-Elez;M. Fernandez;M. Anido;H. Du;N. Bagherzadeh;R. Hermida
Affiliations:
Universidad Complutense de Madrid;Universidad Complutense de Madrid;Federal University do Rio de Janeiro;University of California at Irvine;University of California at Irvine;Universidad Complutense de Madrid
Venue:
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Year:
2003

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Abstract

This paper presents a new technique to improve the efficiency of data scheduling for multi-context reconfigurable architectures targeting multimedia and DSP applications. The main goal is to improve application energy consumption. Two levels of on-chip data storage are assumed in the reconfigurable architecture. The Data Scheduler attempts to optimally exploit this storage, by deciding in which on-chip memory the data have to be stored in order to reduce energy consumption. We also show that a suitable data scheduling could decrease the energy required to implement the dynamic reconfiguration of the system.