Minimizing FPGA Reconfiguration Data at Logic Level

Authors:
Krishna Raghuraman;Haibo Wang;Spyros Tragoudas
Affiliations:
Southern Illinois University, Carbondale, IL;Southern Illinois University, Carbondale, IL;Southern Illinois University, Carbondale, IL
Venue:
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Year:
2006

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Abstract

A framework that relates the size of FPGA reconfiguration data to the number of minterms of a specially constructed function is presented. Three techniques, variable mapping optimization, circuit don't-care modification, and look-up table input permutation, are developed to minimize minterms of the special function. The method to integrate the proposed techniques into FPGA design automation flow is discussed and experimental results are presented.