Graph algorithms and NP-completeness
Graph algorithms and NP-completeness
Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
Software pipelining: an effective scheduling technique for VLIW machines
PLDI '88 Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation
Loop optimization in register-transfer scheduling for DSP-systems
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
An efficient resource-constrained global scheduling technique for superscalar and VLIW processors
MICRO 25 Proceedings of the 25th annual international symposium on Microarchitecture
An effective methodology for functional pipelining
ICCAD '92 1992 IEEE/ACM international conference proceedings on Computer-aided design
Sequential circuit delay optimization using global path delays
DAC '93 Proceedings of the 30th international Design Automation Conference
Efficient implementation of retiming
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Decomposed software pipelining: a new perspective and a new approach
International Journal of Parallel Programming
The Chinook hardware/software co-synthesis system
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Architectural retiming: pipelining latency-constrained circuits
DAC '96 Proceedings of the 33rd annual Design Automation Conference
A Framework for Resource-Constrained Rate-Optimal Software Pipelining
IEEE Transactions on Parallel and Distributed Systems
An improved algorithm for minimum-area retiming
DAC '97 Proceedings of the 34th annual Design Automation Conference
Integration, the VLSI Journal
Circuit Retiming Applied to Decomposed Software Pipelining
IEEE Transactions on Parallel and Distributed Systems
Heuristic Loop-Based Scheduling and Allocation for DSP Synthesis with Heterogeneous Functional Units
Journal of VLSI Signal Processing Systems
Marsh: min-area retiming with setup and hold constraints
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Partitioning and pipelining for performance-constrained hardware/software systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Advanced Computer Architecture: Parallelism,Scalability,Programmability
Advanced Computer Architecture: Parallelism,Scalability,Programmability
Hardware-Software Cosynthesis for Digital Systems
IEEE Design & Test
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
Scheduling for Embedded Real-Time Systems
IEEE Design & Test
The D30V/MPEG Multimedia Processor
IEEE Micro
SuperENC: MPEG-2 Video Encoder Chip
IEEE Micro
Scheduling Data-Flow Graphs via Retiming and Unfolding
IEEE Transactions on Parallel and Distributed Systems
Hardware/Software Partitioning using Integer Programming
EDTC '96 Proceedings of the 1996 European conference on Design and Test
MICRO 14 Proceedings of the 14th annual workshop on Microprogramming
ICCD '99 Proceedings of the 1999 IEEE International Conference on Computer Design
The complexity of generalized retiming problems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Rotation scheduling: a loop pipelining algorithm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
COHRA: hardware-software cosynthesis of hierarchical heterogeneous distributed embedded systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Hardware/software co-synthesis with memory hierarchies
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Sehwa: a software package for synthesis of pipelines from behavioral specifications
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
High-level DSP synthesis using concurrent transformations, scheduling, and allocation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Fast co-simulation of transformative systems with OS support on SMP computer
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Embedded Software in Real-Time Pervasive Computing Environments
COMPSAC '04 Proceedings of the 28th Annual International Computer Software and Applications Conference - Volume 01
Resource mapping and scheduling for heterogeneous network processor systems
Proceedings of the 2005 ACM symposium on Architecture for networking and communications systems
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Algorithmic aspects of area-efficient hardware/software partitioning
The Journal of Supercomputing
Exploiting coarse-grained task, data, and pipeline parallelism in stream programs
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
HW/SW partitioning using discrete particle swarm
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Efficient design methods for embedded communication systems
EURASIP Journal on Embedded Systems
EMSOFT '07 Proceedings of the 7th ACM & IEEE international conference on Embedded software
International Journal of Parallel Programming - Special Issue on Multiprocessor-based embedded systems
A Constraint Programming Approach for Allocation and Scheduling on the CELL Broadband Engine
CP '08 Proceedings of the 14th international conference on Principles and Practice of Constraint Programming
Algorithmic aspects for power-efficient hardware/software partitioning
Mathematics and Computers in Simulation
A Framework for Task Scheduling and Memory Partitioning for Multi-Processor System-on-Chip
HiPEAC '09 Proceedings of the 4th International Conference on High Performance Embedded Architectures and Compilers
New model and algorithm for hardware/software partitioning
Journal of Computer Science and Technology
Pipelined data parallel task mapping/scheduling technique for MPSoC
Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the 16th Asia and South Pacific Design Automation Conference
The MOPED framework: Object recognition and pose estimation for manipulation
International Journal of Robotics Research
ICA3PP'12 Proceedings of the 12th international conference on Algorithms and Architectures for Parallel Processing - Volume Part I
Predicate-aware, makespan-preserving software pipelining of scheduling tables
ACM Transactions on Architecture and Code Optimization (TACO)
Efficient heuristic and tabu search for hardware/software partitioning
The Journal of Supercomputing
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Transformative applications are computation intensive applications characterized by iterative dataflow behavior. Typical examples are image processing applications like JPEG, MPEG, etc. The performance of embedded hardware-software systems that implement transformative applications can be maximized by obtaining a pipelined design. We present a tool for hardware-software partitioning and pipelined scheduling of transformative applications. The tool uses iterative partitioning and pipelined scheduling to obtain optimal partitions that satisfy the timing and area constraints. The partitioner uses a branch and bound approach with a unique objective function that minimizes the initiation interval of the final design. We present techniques for generation of good initial solution and search-space limitation for the branch and bound algorithm. A candidate partition is evaluated by generating its pipelined schedule. The scheduler uses a novel retiming heuristic that optimizes the initiation interval, number of pipeline stages, and memory requirements of the particular design alternative. We evaluate the performance of the retiming heuristic by comparing it with an existing technique. The effectiveness of the entire tool is demonstrated by a case study of the JPEG image compression algorithm. We also evaluate the run time and design quality of the tool by experimentation with synthetic graphs.