Software pipelining: an effective scheduling technique for VLIW machines
PLDI '88 Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation
Register allocation for software pipelined loops
PLDI '92 Proceedings of the ACM SIGPLAN 1992 conference on Programming language design and implementation
Lifetime-sensitive modulo scheduling
PLDI '93 Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation
Minimizing register requirements under resource-constrained rate-optimal software pipelining
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
ACM Computing Surveys (CSUR)
Circuit Retiming Applied to Decomposed Software Pipelining
IEEE Transactions on Parallel and Distributed Systems
Advanced compiler design and implementation
Advanced compiler design and implementation
Scheduling with bus access optimization for distributed embedded systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on the 11th international symposium on system-level synthesis and design (ISSS'98)
Computers and Intractability: A Guide to the Theory of NP-Completeness
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Hardware-Software partitioning and pipelined scheduling of transformative applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Bus Architectures for Safety-Critical Embedded Systems
EMSOFT '01 Proceedings of the First International Workshop on Embedded Software
Predicate-aware scheduling: a technique for reducing resource constraints
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
From simulink to SCADE/lustre to TTA: a layered approach for distributed embedded applications
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems
MICRO 14 Proceedings of the 14th annual workshop on Microprogramming
MEMOCODE '03 Proceedings of the First ACM and IEEE International Conference on Formal Methods and Models for Co-Design
Optimal Code Size Reduction for Software-Pipelined Loops on DSP Applications
ICPP '02 Proceedings of the 2002 International Conference on Parallel Processing
Register Constrained Modulo Scheduling
IEEE Transactions on Parallel and Distributed Systems
Time optimal software pipelining of loops with control flows
International Journal of Parallel Programming
Extensible and Scalable Time Triggered Scheduling
ACSD '05 Proceedings of the Fifth International Conference on Application of Concurrency to System Design
Computer Architecture, Fourth Edition: A Quantitative Approach
Computer Architecture, Fourth Edition: A Quantitative Approach
Multi-criteria scheduling of pipeline workflows
CLUSTER '07 Proceedings of the 2007 IEEE International Conference on Cluster Computing
Clock-driven distributed real-time implementation of endochronous synchronous programs
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Pipelined data parallel task mapping/scheduling technique for MPSoC
Proceedings of the Conference on Design, Automation and Test in Europe
EMSOFT '10 Proceedings of the tenth ACM international conference on Embedded software
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We propose a software pipelining technique adapted to specific hard real-time scheduling problems. Our technique optimizes both computation throughput and execution cycle makespan, with makespan being prioritary. It also takes advantage of the predicated execution mechanisms of our embedded execution platform. To do so, it uses a reservation table formalism allowing the manipulation of the execution conditions of operations. Our reservation tables allow the double reservation of a resource at the same dates by two different operations, if the operations have exclusive execution conditions. Our analyses can determine when double reservation is possible even for operations belonging to different iterations.