A scheduling and pipelining algorithm for hardware/software systems
ISSS '97 Proceedings of the 10th international symposium on System synthesis
Scheduling of conditional process graphs for the synthesis of embedded systems
Proceedings of the conference on Design, automation and test in Europe
A constructive algorithm for memory-aware task assignment and scheduling
Proceedings of the ninth international symposium on Hardware/software codesign
Hardware-Software partitioning and pipelined scheduling of transformative applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Algorithms for Hybrid MILP/CP Models for a Class of Optimization Problems
INFORMS Journal on Computing
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
RTAS '03 Proceedings of the The 9th IEEE Real-Time and Embedded Technology and Applications Symposium
Optimizing Compiler for the CELL Processor
Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques
MPI Microtask for programming the cell broadband engineTM processor
IBM Systems Journal
CellSs: a programming model for the cell BE architecture
Proceedings of the 2006 ACM/IEEE conference on Supercomputing
From precedence constraint posting to partial order schedules: A CSP approach to Robust Scheduling
AI Communications - Constraint Programming for Planning and Scheduling
Complete MCS-based search: application to resource constrained project scheduling
IJCAI'05 Proceedings of the 19th international joint conference on Artificial intelligence
Multi-stage benders decomposition for optimizing multicore architectures
CPAIOR'08 Proceedings of the 5th international conference on Integration of AI and OR techniques in constraint programming for combinatorial optimization problems
Allocation, scheduling and voltage scaling on energy aware MPSoCs
CPAIOR'06 Proceedings of the Third international conference on Integration of AI and OR Techniques in Constraint Programming for Combinatorial Optimization Problems
Constrained global scheduling of streaming applications on MPSoCs
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Design space exploration towards a realtime and energy-aware GPGPU-based analysis of biosensor data
Computer Science - Research and Development
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The Cell BE processor provides both scalable computation power and flexibility, and it is already being adopted for many computational intensive applications like aerospace, defense, medical imaging and gaming. Despite of its merits, it also presents many challenges, as it is now widely known that is very difficult to program the Cell BE in an efficient manner. Hence, the creation of an efficient software development framework is becoming the key challenge for this computational platform.We have developed a novel software toolkit, called Cellflow, which enables developers to quickly build multi-task applications for Cell-based platform. We support programmers from the initial stage of their work, through a development-time software infrastructure, to the final stage of the application development, proposing a safe and easy-to-use explicit parallel programming model.A fundamental component of the software toolkit is the off-line allocator and scheduler that manages hardware resources while optimizing performance metrics such as execution time, allocation costs, power. The optimization engine receives as input a task graph representing an application, the hardware resources and produces an optimal allocation and scheduling. We have developed various approaches, either based on decomposition [5] or based on pure Constraint Programming, this latter being the core of this paper. We have identified instance features that guide toward the choice of the best solver for the instance at hand.Experimental result show that Constraint Programming (possibly combined with Integer Programming) is a proper tool for dealing with this kind of applications achieving very good performance.