Scheduling of conditional process graphs for the synthesis of embedded systems

Authors:
P. Eles;K. Kuchcinski;Z. Peng;A. Doboli;P. Pop
Affiliations:
Dept. of Computer and Information Science, Linköping University, Sweden and Computer Science Engineering Department, Technical University of Timisoara, Romania;Dept. of Computer and Information Science, Linköping University, Sweden;Dept. of Computer and Information Science, Linköping University, Sweden;Computer Science Engineering Department, Technical University of Timisoara, Romania;Computer Science Engineering Department, Technical University of Timisoara, Romania
Venue:
Proceedings of the conference on Design, automation and test in Europe
Year:
1998

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Abstract

We present an approach to process scheduling based on an abstract graph representation which captures both dataflow and the flow of control. Target architectures consist of several processors, ASICs and shared busses. We have developed a heuristic which generates a schedule table so that the worst case delay is minimized. Several experiments demonstrate the efficiency of the approach.