Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
Real-time Euclid: a language for reliable real-time systems
IEEE Transactions on Software Engineering - Special issue on reliability and safety in real-time process control
Calculating the maximum, execution time of real-time programs
Real-Time Systems
Timing Verification and the Timing Analysis program
DAC '82 Proceedings of the 19th Design Automation Conference
Performance estimation of embedded software with instruction cache modeling
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Analysis of operation delay and execution rate constraints for embedded systems
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Efficient software performance estimation methods for hardware/software codesign
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Performance Estimation for Real-Time Distributed Embedded Systems
IEEE Transactions on Parallel and Distributed Systems
Fast hardware-software co-simulation using VHDL models
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Performance estimation of embedded software with instruction cache modeling
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Efficient and Precise Cache Behavior Prediction for Real-TimeSystems
Real-Time Systems
Fast and Precise WCET Prediction by Separated Cache andPath Analyses
Real-Time Systems - Special issue on worst-case execution-time analysis
Reliable estimation of execution time of embedded software
Proceedings of the conference on Design, automation and test in Europe
Scheduling of conditional process graphs for the synthesis of embedded systems
Proceedings of the conference on Design, automation and test in Europe
Hybrid global/local search strategies for dynamic voltage scaling in embedded multiprocessors
Proceedings of the ninth international symposium on Hardware/software codesign
A hardware/software co-design flow and IP library based on simulink
Proceedings of the 38th annual Design Automation Conference
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Efficient longest executable path search for programs with complex flows and pipeline effects
CASES '01 Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems
Performance estimation of embedded software with instruction cache modeling
Readings in hardware/software co-design
Performance estimation for real-time distributed embedded systems
Readings in hardware/software co-design
ILP-Based Interprocedural Path Analysis
EMSOFT '02 Proceedings of the Second International Conference on Embedded Software
System-Level Modelling for Performance Estimation of Reconfigurable Coprocessors
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Worst-case performance analysis of parallel, communicating software processes
Proceedings of the tenth international symposium on Hardware/software codesign
Operation Serializability for Embedded Systems
EDTC '96 Proceedings of the 1996 European conference on Design and Test
RATAN: A Tool for Rate Analysis and Rate Constraint Debugging for Embedded Systems
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Process Partitioning for Distributed Embedded Systems
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
Speed-up estimation for HW/SW-systems
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
Performance Analysis in CoDe-X Partitioning for Structural Programmable Accelerators
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
The use of a virtual instruction set for the software synthesis of Hw/Sw embedded systems
ISSS '96 Proceedings of the 9th international symposium on System synthesis
Clustered calculation of worst-case execution times
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Workload Characterization Model for Tasks with Variable Execution Demand
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Abstraction of assembler programs for symbolic worst case execution time analysis
Proceedings of the 41st annual Design Automation Conference
Accurate software performance estimation using domain classification and neural networks
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
Clustered Worst-Case Execution-Time Calculation
IEEE Transactions on Computers
Floating-to-fixed-point conversion for digital signal processors
EURASIP Journal on Applied Signal Processing
The worst-case execution-time problem—overview of methods and survey of tools
ACM Transactions on Embedded Computing Systems (TECS)
Applying neural networks to performance estimation of embedded software
Journal of Systems Architecture: the EUROMICRO Journal
Virtualizing the data plane through source code merging
Proceedings of the ACM workshop on Programmable routers for extensible services of tomorrow
DynaTest and beyond: From dynamic testing to automated error-prevention and error-detection
Journal of Computational Methods in Sciences and Engineering - Selected papers from the International Conference on Computer Science,Software Engineering, Information Technology, e-Business, and Applications, 2003
WCET determination tool for embedded systems software
Proceedings of the 1st international conference on Simulation tools and techniques for communications, networks and systems & workshops
Challenges in Relational Learning for Real-Time Systems Applications
ILP '08 Proceedings of the 18th international conference on Inductive Logic Programming
Symbolic state traversal for WCET analysis
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Memory hierarchies, pipelines, and buses for future architectures in time-critical embedded systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Development of a high-level simulation approach and its application to multicore video decoding
IEEE Transactions on Circuits and Systems for Video Technology
A compiler framework for the reduction of worst-case execution times
Real-Time Systems
Modeling complex flows for worst-case execution time analysis
RTSS'10 Proceedings of the 21st IEEE conference on Real-time systems symposium
Source-level timing annotation for fast and accurate TLM computation model generation
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
ISoLA'10 Proceedings of the 4th international conference on Leveraging applications of formal methods, verification, and validation - Volume Part I
Context-sensitivity in IPET for measurement-based timing analysis
ISoLA'10 Proceedings of the 4th international conference on Leveraging applications of formal methods, verification, and validation - Volume Part II
Precise and efficient parametric path analysis
Proceedings of the 2011 SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
An efficient algorithm for parametric WCET calculation
Journal of Systems Architecture: the EUROMICRO Journal
Branch target buffers: WCET analysis framework and timing predictability
Journal of Systems Architecture: the EUROMICRO Journal
Beyond loop bounds: comparing annotation languages for worst-case execution time analysis
Software and Systems Modeling (SoSyM)
Symbolic worst case execution times
ICTAC'11 Proceedings of the 8th international conference on Theoretical aspects of computing
Symbolic simulation on complicated loops for WCET path analysis
EMSOFT '11 Proceedings of the ninth ACM international conference on Embedded software
McAiT: a timing analyzer for multicore real-time software
ATVA'11 Proceedings of the 9th international conference on Automated technology for verification and analysis
Static Worst-Case Lifetime Estimation of Vigil Net
GREENCOM '11 Proceedings of the 2011 IEEE/ACM International Conference on Green Computing and Communications
Static timing analysis for hard real-time systems
VMCAI'10 Proceedings of the 11th international conference on Verification, Model Checking, and Abstract Interpretation
Collecting signatures to model latency tolerance in high-level simulations of microthreaded cores
Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools
Worst-case execution time analysis for parallel run-time monitoring
Proceedings of the 49th Annual Design Automation Conference
A Model Checking Based Approach to Bounding Worst-Case Execution Time for Multicore Processors
ACM Transactions on Embedded Computing Systems (TECS) - Special Section on CAPA'09, Special Section on WHS'09, and Special Section VCPSS' 09
Static profiling of the worst-case in real-time programs
Proceedings of the 20th International Conference on Real-Time and Network Systems
Analytical architecture-based performability evaluation of real-time software systems
Journal of Systems and Software
Predictable two-level bus arbitration for heterogeneous task sets
ARCS'13 Proceedings of the 26th international conference on Architecture of Computing Systems
FIFO cache analysis for WCET estimation: a quantitative approach
Proceedings of the Conference on Design, Automation and Test in Europe
Reconciling real-time guarantees and energy efficiency through unlocked-cache prefetching
Proceedings of the 50th Annual Design Automation Conference
Computation takes time, but how much?
Communications of the ACM
Worst-case memory consumption analysis for SCJ
Proceedings of the 11th International Workshop on Java Technologies for Real-time and Embedded Systems
Static analysis of worst-case stack cache behavior
Proceedings of the 21st International conference on Real-Time Networks and Systems
Path-sensitive resource analysis compliant with assertions
Proceedings of the Eleventh ACM International Conference on Embedded Software
Simple analysis of partial worst-case execution paths on general control flow graphs
Proceedings of the Eleventh ACM International Conference on Embedded Software
Evaluating and estimating the WCET criticality metric
Proceedings of the 11th Workshop on Optimizations for DSP and Embedded Systems
WCET analysis with MRU cache: Challenging LRU for predictability
ACM Transactions on Embedded Computing Systems (TECS)
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