McAiT: a timing analyzer for multicore real-time software

Authors:
Mingsong Lv;Nan Guan;Qingxu Deng;Ge Yu;Wang Yi
Affiliations:
Northeastern University, Shenyang, China;Northeastern University, Shenyang, China and Uppsala University, Uppsala, Sweden;Northeastern University, Shenyang, China;Northeastern University, Shenyang, China;Northeastern University, Shenyang, China and Uppsala University, Uppsala, Sweden
Venue:
ATVA'11 Proceedings of the 9th international conference on Automated technology for verification and analysis
Year:
2011

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Abstract

We present McAiT, a tool for estimating the Worst-Case Execution Times (WCET) of programs running on multicore processors. The highlight of McAiT is that it leverages timed automata to model both the timing behaviors of the programs' interaction with its environment (based on the results of local cache analysis by abstract interpretation) and a broad range of on-chip shared resources, such as shared buses and shared caches. McAiT also allows for modeling complex task models, such as synchronization, jitter, etc. High analysis precision is achieved by the McAiT approach, which is demonstrated by extensive experiments. The tool also supports the classical Implicit Path Enumeration Technique (IPET) combined with worst-case shared resource access delay for WCET estimation, to provide the users with the flexibility to trade analysis precision for efficiency.