Neural networks: algorithms, applications, and programming techniques
Neural networks: algorithms, applications, and programming techniques
Performance analysis of embedded software using implicit path enumeration
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Performance estimation of embedded software with instruction cache modeling
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
A compilation-based software estimation scheme for hardware/software co-simulation
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Case study: system model of crane and embedded control
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Static timing analysis of embedded software on advanced processor architectures
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Worst Case Execution Time Analysis for a Processor withBranch Prediction
Real-Time Systems - Special issue on worst-case execution-time analysis
Reliable estimation of execution time of embedded software
Proceedings of the conference on Design, automation and test in Europe
Intervals in software execution cost analysis
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Accurate timing analysis by modeling caches, speculation and their interaction
Proceedings of the 40th annual Design Automation Conference
A Worst Case Timing Analysis Technique for Multiple-Issue Machines
RTSS '98 Proceedings of the IEEE Real-Time Systems Symposium
A Data Analysis Method for Software Performance Prediction
Proceedings of the conference on Design, automation and test in Europe
Fast cycle-approximate instruction set simulation
SCOPES '08 Proceedings of the 11th international workshop on Software & compilers for embedded systems
Applying neural networks to performance estimation of embedded software
Journal of Systems Architecture: the EUROMICRO Journal
SciSim: a software performance estimation framework using source code instrumentation
WOSP '08 Proceedings of the 7th international workshop on Software and performance
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Statistical Performance Modeling in Functional Instruction Set Simulators
ACM Transactions on Embedded Computing Systems (TECS)
Hi-index | 0.01 |
For the design of an embedded system, there is a variety of available processors, each one offering a different trade-off concerning factors such as performance and power consumption. High-level performance estimation of the embedded software implemented in a particular architecture is essential for a fast design space exploration, including the choice of the most appropriate processor. However, advanced architectures present many features, such as deep pipelines, branch prediction mechanisms and cache sizes, that have a non-linear impact on the execution time, which becomes hard to evaluate. In order to cope with this problem, this paper presents a neural network based approach for high-level performance estimation, which easily adapts to the non-linear behavior of the execution time in such advanced architectures. A method for automatic classification of applications is proposed, based on topological information extracted from the control flow graph of the application, enabling the utilization of domain-specific estimators and thus resulting in more accurate estimates. Practical experiments on a variety of benchmarks show estimation results with a mean error of 6.41% and a maximum error of 32%, which is more precise than previous work based on linear and non-linear approaches.