ATOM: a system for building customized program analysis tools
PLDI '94 Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Software performance estimation strategies in a system-level design tool
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Reliable estimation of execution time of embedded software
Proceedings of the conference on Design, automation and test in Europe
Timed compiled-code simulation of embedded software for performance analysis of SOC design
Proceedings of the 39th annual Design Automation Conference
A Data Analysis Method for Software Performance Prediction
Proceedings of the conference on Design, automation and test in Europe
RTOS scheduling in transaction level models
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Exploring Memory Hierarchy with ArchC
SBAC-PAD '03 Proceedings of the 15th Symposium on Computer Architecture and High Performance Computing
Accurate software performance estimation using domain classification and neural networks
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
A timing-accurate HW/SW co-simulation of an ISS with SystemC
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Classification of WCET Analysis Techniques
ISORC '05 Proceedings of the Eighth IEEE International Symposium on Object-Oriented Real-Time Distributed Computing
ISS-centric modular HW/SW co-simulation
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
MiBench: A free, commercially representative embedded benchmark suite
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
Proceedings of the conference on Design, automation and test in Europe: Proceedings
An efficient and portable scheduler for RTOS simulation and its certified integration to SystemC
Proceedings of the conference on Design, automation and test in Europe: Proceedings
PIN: a binary instrumentation tool for computer architecture research and education
WCAE '04 Proceedings of the 2004 workshop on Computer architecture education: held in conjunction with the 31st International Symposium on Computer Architecture
A universal technique for fast and flexible instruction-set architecture simulation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
SysCOLA: a framework for co-development of automotive software and system platform
Proceedings of the 46th Annual Design Automation Conference
An efficient approach for system-level timing simulation of compiler-optimized embedded software
Proceedings of the 46th Annual Design Automation Conference
Software performance simulation strategies for high-level embedded system design
Performance Evaluation
Seamless model-driven development put into practice
ISoLA'10 Proceedings of the 4th international conference on Leveraging applications of formal methods, verification, and validation - Volume Part I
ISoLA'10 Proceedings of the 4th international conference on Leveraging applications of formal methods, verification, and validation - Volume Part I
Instrumentation-based tool for latency measurements
Proceedings of the 2nd ACM/SPEC International Conference on Performance engineering
Fast and accurate cache modeling in source-level simulation of embedded software
Proceedings of the Conference on Design, Automation and Test in Europe
Accurate source-level simulation of embedded software with respect to compiler optimizations
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
IEEE/ACM Transactions on Networking (TON)
Innovations in Systems and Software Engineering
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Recently, software performance estimation based on source code instrumentation shows promising results in the literature. It achieves significant speedup without compromising accuracy, compared with cycle-accurate simulations. However, much work still remains to be done to make this technique flexible and accurate enough to estimate software on complex processors. To the best of our knowledge, we are the first to propose ways to tackle microarchitecture related issues in the source code instrumentation approach. We perform static instruction scheduling for superscalar architectures at instrumentation time and combine instrumented code and microarchitecture simulators to model runtime interactions between software and microarchitecture. We have developed a new framework, SciSim, to provide a common infrastructure for the proposed approach. It is designed to be easily extendable and retargetable to different instruction set architectures and processors. Using SciSim SystemC modules may be automatically generated to integrate software into system-level simulation. We will present the applicability of SciSim in system-level design exploration of multiprocessor systems. At last, experiments with standard benchmarks are presented to validate the speed and accuracy of SciSim.