DAC '96 Proceedings of the 33rd annual Design Automation Conference
Software performance estimation strategies in a system-level design tool
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Reliable estimation of execution time of embedded software
Proceedings of the conference on Design, automation and test in Europe
Timed compiled-code simulation of embedded software for performance analysis of SOC design
Proceedings of the 39th annual Design Automation Conference
Compilation-based software performance estimation for system level design
HLDVT '00 Proceedings of the IEEE International High-Level Validation and Test Workshop (HLDVT'00)
Classification of WCET Analysis Techniques
ISORC '05 Proceedings of the Eighth IEEE International Symposium on Object-Oriented Real-Time Distributed Computing
ISS-centric modular HW/SW co-simulation
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Design and Implementation of aWorkload Specific Simulator
ANSS '06 Proceedings of the 39th annual Symposium on Simulation
SciSim: a software performance estimation framework using source code instrumentation
WOSP '08 Proceedings of the 7th international workshop on Software and performance
High-performance timing simulation of embedded software
Proceedings of the 45th annual Design Automation Conference
Source-level timing annotation and simulation for a heterogeneous multiprocessor
Proceedings of the conference on Design, automation and test in Europe
Framework for fast and accurate performance simulation of multiprocessor systems
HLDVT '07 Proceedings of the 2007 IEEE International High Level Design Validation and Test Workshop
A universal technique for fast and flexible instruction-set architecture simulation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
HdSC: a fast and preemptive modeling for on host HdS development
Proceedings of the 24th symposium on Integrated circuits and systems design
Accurate source-level simulation of embedded software with respect to compiler optimizations
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Hi-index | 0.00 |
As most embedded applications are realized in software, software performance estimation is a very important issue in embedded system design. In the last decades, instruction set simulators (ISSs) have become an essential part of an embedded software design process. However, ISSs are either slow or very difficult to develop. With the advent of multiprocessor systems and their ever-increasing complexity, the software simulation strategy based on ISSs is no longer efficient enough for exploring the large design space of multiprocessor systems in early design phases. Motivated by the limitations of ISSs, a lot of recent research activities focused on software simulation strategies based on native execution. In this article, we first introduce some existing software performance simulation strategies as well as our own approach for source level simulation, called SciSim, and provide a discussion about their benefits and limitations. The main contribution of this article is to introduce a new software performance simulation approach, called iSciSim (intermediate Source code instrumentation based Simulation), which achieves high estimation accuracy, high simulation speed and low implementation complexity. All these advantages make iSciSim well-suited for system level design. To show the benefits of the proposed approach, we present a quantitative comparison between iSciSim and the other discussed techniques, using a set of benchmarks.