Framework for fast and accurate performance simulation of multiprocessor systems

Authors:
Eric Cheung;Harry Hsieh;Felice Balarin
Affiliations:
Department of Computer Science and Engineering, University of California Riverside, Riverside, 92521, USA;Department of Computer Science and Engineering, University of California Riverside, Riverside, 92521, USA;Cadence Design Systems, Berkeley, California 95134, USA
Venue:
HLDVT '07 Proceedings of the 2007 IEEE International High Level Design Validation and Test Workshop
Year:
2007

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Abstract

In this paper we develop a framework for fast and accurate multiprocessor system performance simulation. Our simulation model generator generates simulation modules with accurate time deltas for software processes based on the intermediate representations generated by a compiler. The simulation modules are simulated as concurrent tasks in multiprocessor system performance simulation environment in SystemC. We use aggregated waits to reduce overhead in the simulation kernel and triple the speed of the simulation. Our study shows that we can obtain overall system performance results with less than 6% error while simulating at 150X faster than using an Instruction Set Simulator. This opens up system design space explorations that were not possible before.