Interprocedural slicing using dependence graphs
PLDI '88 Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation
Achieving high instruction cache performance with an optimizing compiler
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
Compile time instruction cache optimizations
ACM SIGARCH Computer Architecture News - Special issue: panel sessions of the 1991 workshop on multithreaded computers
Performance analysis of embedded software using implicit path enumeration
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Code placement techniques for cache miss rate reduction
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Guest Editorial: A Review of Worst-Case Execution-TimeAnalysis
Real-Time Systems - Special issue on worst-case execution-time analysis
POPL '77 Proceedings of the 4th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Deriving Annotations for Tight Calculation of Execution Time
Euro-Par '97 Proceedings of the Third International Euro-Par Conference on Parallel Processing
Reliable and Precise WCET Determination for a Real-Life Processor
EMSOFT '01 Proceedings of the First International Workshop on Embedded Software
Bounding Loop Iterations for Timing Analysis
RTAS '98 Proceedings of the Fourth IEEE Real-Time Technology and Applications Symposium
RTAS '99 Proceedings of the Fifth IEEE Real-Time Technology and Applications Symposium
Transformation of Path Information for WCET Analysis during Compilation
ECRTS '01 Proceedings of the 13th Euromicro Conference on Real-Time Systems
A Modular & Retargetable Framework for Tree-Based WCET Analysis
ECRTS '01 Proceedings of the 13th Euromicro Conference on Real-Time Systems
Program slices: formal, psychological, and practical investigations of an automatic program abstraction method
TDL: a hardware description language for retargetable postpass optimizations and analyses
Proceedings of the 2nd international conference on Generative programming and component engineering
Tuning the WCET of Embedded Applications
RTAS '04 Proceedings of the 10th IEEE Real-Time and Embedded Technology and Applications Symposium
Control Flow Driven Splitting of Loop Nests at the Source Code Level
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Analytical computation of Ehrhart polynomials: enabling more compiler analyses and optimizations
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
Influence of Memory Hierarchies on Predictability for Time Constrained Embedded Software
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Improving WCET by Optimizing Worst-Case Paths
RTAS '05 Proceedings of the 11th IEEE Real Time on Embedded Technology and Applications Symposium
Cache Contents Selection for Statically-Locked Instruction Caches: An Algorithm Comparison
ECRTS '05 Proceedings of the 17th Euromicro Conference on Real-Time Systems
WCET Centric Data Allocation to Scratchpad Memory
RTSS '05 Proceedings of the 26th IEEE International Real-Time Systems Symposium
Faster WCET flow analysis by program slicing
Proceedings of the 2006 ACM SIGPLAN/SIGBED conference on Language, compilers, and tool support for embedded systems
The ArchC architecture description language and tools
International Journal of Parallel Programming
WCET-Centric Software-controlled Instruction Caches for Hard Real-Time Systems
ECRTS '06 Proceedings of the 18th Euromicro Conference on Real-Time Systems
Automatic Derivation of Loop Bounds and Infeasible Paths for WCET Analysis Using Abstract Execution
RTSS '06 Proceedings of the 27th IEEE International Real-Time Systems Symposium
Fast, Efficient and Predictable Memory Accesses: Optimization Algorithms for Memory Architecture Aware Compilation
WCET-Directed Dynamic Scratchpad Memory Allocation of Data
ECRTS '07 Proceedings of the 19th Euromicro Conference on Real-Time Systems
Influence of procedure cloning on WCET prediction
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Compile-time decided instruction cache locking using worst-case execution paths
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Design of a WCET-Aware C Compiler
ESTMED '06 Proceedings of the 2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia
WCET-driven Cache-based Procedure Positioning Optimizations
ECRTS '08 Proceedings of the 2008 Euromicro Conference on Real-Time Systems
Advanced Memory Optimization Techniques for Low-Power Embedded Processors
Advanced Memory Optimization Techniques for Low-Power Embedded Processors
Proceedings of the 7th annual IEEE/ACM International Symposium on Code Generation and Optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Timing and schedulability analysis for distributed automotive control applications
EMSOFT '11 Proceedings of the ninth ACM international conference on Embedded software
WCET-driven cache-aware code positioning
CASES '11 Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems
WCET-driven branch prediction aware code positioning
CASES '11 Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems
Dominator homomorphism based code matching for source-level simulation of embedded software
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Software—Practice & Experience
WCET-aware static locking of instruction caches
Proceedings of the Tenth International Symposium on Code Generation and Optimization
Combined WCET analysis of bitcode and machine code using control-flow relation graphs
Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
Building timing predictable embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
A new concept for system-level design of runtime reconfigurable real-time systems
ACM SIGBED Review - Special Issue on the 5th Workshop on Adaptive and Reconfigurable Embedded Systems
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The current practice to design software for real-time systems is tedious. There is almost no tool support that assists the designer in automatically deriving safe bounds of the worst-case execution time (WCET) of a system during code generation and in systematically optimizing code to reduce WCET.This article presents concepts and infrastructures for WCET-aware code generation and optimization techniques for WCET reduction. All together, they help to obtain code explicitly optimized for its worst-case timing, to automate large parts of the real-time software design flow, and to reduce costs of a real-time system by allowing to use tailored hardware.