Compile time instruction cache optimizations

Authors:
Abraham Mendlson;Shlomit S. Pinter;Ruth Shtokhamer
Affiliations:
Dept. of Electrical Engineering, Technion - - Israel Institute of Technology, Haifa 32000, Israel;Dept. of Electrical Engineering, Technion - - Israel Institute of Technology, Haifa 32000, Israel;Dept. of Computer and Information Sciences, University of Delaware, Newark, Delaware
Venue:
ACM SIGARCH Computer Architecture News - Special issue: panel sessions of the 1991 workshop on multithreaded computers
Year:
1994

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Abstract

This paper presents a new approach for improving performance of instruction cache based systems. The idea is to prevent cache misses caused when different segments of code which are executed in the same loop are mapped onto the same cache area. The new approach uses static information only and does not rely on any special hardware mechanisms such as support of noncachable addresses.The technique is based on replication of code together with algorithms for code placement. We introduce the notion of abstract caches and present simulation results of the new technique. The results show that in certain cases, the number of cache misses is reduced by two orders of magnitude.