Scalable precision cache analysis for real-time software
ACM Transactions on Embedded Computing Systems (TECS) - Special Section LCTES'05
Compile-time decided instruction cache locking using worst-case execution paths
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Proceedings of th 12th International Workshop on Software and Compilers for Embedded Systems
Optimal static WCET-aware scratchpad allocation of program code
Proceedings of the 46th Annual Design Automation Conference
A compiler framework for the reduction of worst-case execution times
Real-Time Systems
An algorithm for deciding minimal cache sizes in real-time systems
Proceedings of the 13th annual conference on Genetic and evolutionary computation
Journal of Systems Architecture: the EUROMICRO Journal
Software—Practice & Experience
Instruction cache locking for multi-task real-time embedded systems
Real-Time Systems
WCET-centric partial instruction cache locking
Proceedings of the 49th Annual Design Automation Conference
WCET-aware static locking of instruction caches
Proceedings of the Tenth International Symposium on Code Generation and Optimization
Optimising task layout to increase schedulability via reduced cache related pre-emption delays
Proceedings of the 20th International Conference on Real-Time and Network Systems
Integrated instruction cache analysis and locking in multitasking real-time systems
Proceedings of the 50th Annual Design Automation Conference
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This paper presents a general framework for analyzing and designing embedded systems with energy and timing requirements. A set of realistic assumptions is considered in the model in order to apply the results in practical realtime applications. For ...