Dynamic management of scratch-pad memory space
Proceedings of the 38th annual Design Automation Conference
Bounding Cache-Related Preemption Delay for Real-Time Systems
IEEE Transactions on Software Engineering
Low-Complexity Algorithms for Static Cache Locking in Multitasking Hard Real-Time Systems
RTSS '02 Proceedings of the 23rd IEEE Real-Time Systems Symposium
Compiler-decided dynamic memory allocation for scratch-pad based embedded systems
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
A first look at the interplay of code reordering and configurable caches
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Cache Contents Selection for Statically-Locked Instruction Caches: An Algorithm Comparison
ECRTS '05 Proceedings of the 17th Euromicro Conference on Real-Time Systems
Improving WCET by applying a WC code-positioning optimization
ACM Transactions on Architecture and Code Optimization (TACO)
Procedure placement using temporal-ordering information: Dealing with code size expansion
Journal of Embedded Computing - Cache exploitation in embedded systems
Scratchpad memories vs locked caches in hard real-time systems: a quantitative comparison
Proceedings of the conference on Design, automation and test in Europe
Compile-time decided instruction cache locking using worst-case execution paths
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Cache-aware timing analysis of streaming applications
Real-Time Systems
Minimizing WCET for Real-Time Embedded Systems via Static Instruction Cache Locking
RTAS '09 Proceedings of the 2009 15th IEEE Symposium on Real-Time and Embedded Technology and Applications
Instruction Cache Locking for Real-Time Embedded Systems with Multi-tasks
RTCSA '09 Proceedings of the 2009 15th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications
Optimising task layout to increase schedulability via reduced cache related pre-emption delays
Proceedings of the 20th International Conference on Real-Time and Network Systems
Integrated instruction cache analysis and locking in multitasking real-time systems
Proceedings of the 50th Annual Design Automation Conference
Explicit reservation of cache memory in a predictable, preemptive multitasking real-time system
ACM Transactions on Embedded Computing Systems (TECS)
Joint cache partition and job assignment on multi-core processors
WADS'13 Proceedings of the 13th international conference on Algorithms and Data Structures
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In a multi-task embedded system, a cache is shared by different tasks, which increases the complexity of cache management and the unpredictability of cache behavior. This unpredictability in turn brings an overestimation of application's worst-case execution time (WCET) and worst-case CPU utilization (WCU) which are two of the most important criteria for real-time embedded systems. Modern processors often provide cache locking capability, which can be applied statically and dynamically to manage cache in a predictable manner. The selection of instructions to be locked in the instruction cache (I-Cache) has dramatic influence on the system performance. This paper focuses on applying cache locking techniques to the shared I-Cache to minimize WCU for multi-task embedded systems. We analyze and compare three different strategies to perform I-Cache locking: static locking, semi-dynamic locking, and dynamic locking. Different algorithms are proposed utilizing the foreknown information of embedded applications. Experimental results show that the proposed algorithms can reduce WCU compared to previous techniques.