What is predictability for real-time systems?
Real-Time Systems
Compiler support for software-based cache partitioning
LCTES '95 Proceedings of the ACM SIGPLAN 1995 workshop on Languages, compilers, & tools for real-time systems
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
Journal of Systems Architecture: the EUROMICRO Journal
Proof, language, and interaction
Software fault tolerance techniques and implementation
Software fault tolerance techniques and implementation
Introduction to Coding Theory
Reed-Solomon Codes and Their Applications
Reed-Solomon Codes and Their Applications
Tradeoffs in the Design of Single Chip Multiprocessors
PACT '94 Proceedings of the IFIP WG10.3 Working Conference on Parallel Architectures and Compilation Techniques
REFLIX: A Processor Core for Reactive Embedded Applications
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Weakly Hard Real-time Constraints on Controller Area Network
ECRTS '02 Proceedings of the 14th Euromicro Conference on Real-Time Systems
Timing Anomalies in Dynamically Scheduled Microprocessors
RTSS '99 Proceedings of the 20th IEEE Real-Time Systems Symposium
Probabilistic Analysis of CAN with Faults
RTSS '02 Proceedings of the 23rd IEEE Real-Time Systems Symposium
Transformation of Path Information for WCET Analysis during Compilation
ECRTS '01 Proceedings of the 13th Euromicro Conference on Real-Time Systems
Low Cost Convolutional Code Based Concurrent Error Detection in FSMs
DFT '03 Proceedings of the 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
Multiprocessor EDF and Deadline Monotonic Schedulability Analysis
RTSS '03 Proceedings of the 24th IEEE International Real-Time Systems Symposium
Fingerprinting: bounding soft-error detection latency and bandwidth
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Design for Timing Predictability
Real-Time Systems
Improving WCET by Optimizing Worst-Case Paths
RTAS '05 Proceedings of the 11th IEEE Real Time on Embedded Technology and Applications Symposium
A time-predictable execution mode for superscalar pipelines with instruction prescheduling
Proceedings of the 2nd conference on Computing frontiers
Virtual multiprocessor: an analyzable, high-performance architecture for real-time computing
Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
WCET Centric Data Allocation to Scratchpad Memory
RTSS '05 Proceedings of the 26th IEEE International Real-Time Systems Symposium
Synthesis of Fault-Tolerant Embedded Systems with Checkpointing and Replication
DELTA '06 Proceedings of the Third IEEE International Workshop on Electronic Design, Test and Applications
Improving WCET by applying a WC code-positioning optimization
ACM Transactions on Architecture and Code Optimization (TACO)
LITMUS^RT: A Testbed for Empirically Comparing Real-Time Multiprocessor Schedulers
RTSS '06 Proceedings of the 27th IEEE International Real-Time Systems Symposium
The case for the precision timed (PRET) machine
Proceedings of the 44th annual Design Automation Conference
Predator: a predictable SDRAM memory controller
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Optimal task placement to improve cache performance
EMSOFT '07 Proceedings of the 7th ACM & IEEE international conference on Embedded software
The N-Version Approach to Fault-Tolerant Software
IEEE Transactions on Software Engineering
RTSS '07 Proceedings of the 28th IEEE International Real-Time Systems Symposium
Techniques for Multiprocessor Global Schedulability Analysis
RTSS '07 Proceedings of the 28th IEEE International Real-Time Systems Symposium
Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip
VLSID '08 Proceedings of the 21st International Conference on VLSI Design
The worst-case execution-time problem—overview of methods and survey of tools
ACM Transactions on Embedded Computing Systems (TECS)
Portioned EDF-based scheduling on multiprocessors
EMSOFT '08 Proceedings of the 8th ACM international conference on Embedded software
Predictable programming on a precision timed architecture
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
Performance debugging of Esterel specifications
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
Compilation and worst-case reaction time analysis for multithreaded Esterel processing
EURASIP Journal on Embedded Systems - Model-driven high-level programming of embedded systems: selected papers from SLA++P'07 and SLA++P'08
Compiling Esterel
Minimizing WCET for Real-Time Embedded Systems via Static Instruction Cache Locking
RTAS '09 Proceedings of the 2009 15th IEEE Symposium on Real-Time and Embedded Technology and Applications
Execution Strategies for PTIDES, a Programming Model for Distributed Embedded Systems
RTAS '09 Proceedings of the 2009 15th IEEE Symposium on Real-Time and Embedded Technology and Applications
STARPro --- A new multithreaded direct execution platform for Esterel
Electronic Notes in Theoretical Computer Science (ENTCS)
Hardware support for WCET analysis of hard real-time multicore systems
Proceedings of the 36th annual international symposium on Computer architecture
Partitioned Fixed-Priority Preemptive Scheduling for Multi-core Processors
ECRTS '09 Proceedings of the 2009 21st Euromicro Conference on Real-Time Systems
SyncCharts in C: a proposal for light-weight, deterministic concurrency
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Cache-aware scheduling and analysis for multicores
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Optimal static WCET-aware scratchpad allocation of program code
Proceedings of the 46th Annual Design Automation Conference
Memory hierarchies, pipelines, and buses for future architectures in time-critical embedded systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Reliability Analysis of Single Bus Communication with Real-Time Requirements
PRDC '09 Proceedings of the 2009 15th IEEE Pacific Rim International Symposium on Dependable Computing
New Response Time Bounds for Fixed Priority Multiprocessor Scheduling
RTSS '09 Proceedings of the 2009 30th IEEE Real-Time Systems Symposium
Timing Analysis of Concurrent Programs Running on Shared Cache Multi-Cores
RTSS '09 Proceedings of the 2009 30th IEEE Real-Time Systems Symposium
Using Bypass to Tighten WCET Estimates for Multi-Core Processors with Shared Instruction Caches
RTSS '09 Proceedings of the 2009 30th IEEE Real-Time Systems Symposium
A predictable simultaneous multithreading scheme for hard real-time
ARCS'08 Proceedings of the 21st international conference on Architecture of computing systems
Modeling shared cache and bus in multi-cores for timing analysis
Proceedings of the 13th International Workshop on Software & Compilers for Embedded Systems
Fixed-Priority Multiprocessor Scheduling with Liu and Layland's Utilization Bound
RTAS '10 Proceedings of the 2010 16th IEEE Real-Time and Embedded Technology and Applications Symposium
ACM SIGBED Review - Special Issue on the Work-in-Progress (WIP) Session at the 2009 IEEE Real-Time Systems Symposium (RTSS)
A compiler framework for the reduction of worst-case execution times
Real-Time Systems
Worst case delay analysis for memory interference in multicore systems
Proceedings of the Conference on Design, Automation and Test in Europe
Bounding the shared resource load for the performance analysis of multiprocessor systems
Proceedings of the Conference on Design, Automation and Test in Europe
An Empirical Comparison of Global, Partitioned, and Clustered Multiprocessor EDF Schedulers
RTSS '10 Proceedings of the 2010 31st IEEE Real-Time Systems Symposium
Combining Abstract Interpretation with Model Checking for Timing Analysis of Multicore Software
RTSS '10 Proceedings of the 2010 31st IEEE Real-Time Systems Symposium
IA^3: An Interference Aware Allocation Algorithm for Multicore Hard Real-Time Systems
RTAS '11 Proceedings of the 2011 17th IEEE Real-Time and Embedded Technology and Applications Symposium
Temporal isolation on multiprocessing architectures
Proceedings of the 48th Design Automation Conference
Joint task assignment and cache partitioning with cache locking for WCET minimization on MPSoC
Journal of Parallel and Distributed Computing
WCET-driven cache-aware code positioning
CASES '11 Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems
PRET DRAM controller: bank privatization for predictability and temporal isolation
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Reliability analysis for MPSoCs with mixed-critical, hard real-time constraints
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Hard Real-Time Computing Systems: Predictable Scheduling Algorithms and Applications
Hard Real-Time Computing Systems: Predictable Scheduling Algorithms and Applications
Is Semi-Partitioned Scheduling Practical?
ECRTS '11 Proceedings of the 2011 23rd Euromicro Conference on Real-Time Systems
ACM Transactions on Architecture and Code Optimization (TACO) - HIPEAC Papers
PRDC '11 Proceedings of the 2011 IEEE 17th Pacific Rim International Symposium on Dependable Computing
Multithreaded Reactive Programming—the Kiel Esterel Processor
IEEE Transactions on Computers
An Analyzable Memory Controller for Hard Real-Time CMPs
IEEE Embedded Systems Letters
WCET-aware data selection and allocation for scratchpad memory
Proceedings of the 13th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory for Embedded Systems
Leveraging Multi-core Computing Architectures in Avionics
EDCC '12 Proceedings of the 2012 Ninth European Dependable Computing Conference
RTCSA '12 Proceedings of the 2012 IEEE International Conference on Embedded and Real-Time Computing Systems and Applications
Assessing the suitability of the NGMP multi-core processor in the space domain
Proceedings of the tenth ACM international conference on Embedded software
A PRET microarchitecture implementation with repeatable timing and competitive performance
ICCD '12 Proceedings of the 2012 IEEE 30th International Conference on Computer Design (ICCD 2012)
Sensitivity of cache replacement policies
ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems
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A large class of embedded systems is distinguished from general-purpose computing systems by the need to satisfy strict requirements on timing, often under constraints on available resources. Predictable system design is concerned with the challenge of building systems for which timing requirements can be guaranteed a priori. Perhaps paradoxically, this problem has become more difficult by the introduction of performance-enhancing architectural elements, such as caches, pipelines, and multithreading, which introduce a large degree of uncertainty and make guarantees harder to provide. The intention of this article is to summarize the current state of the art in research concerning how to build predictable yet performant systems. We suggest precise definitions for the concept of “predictability”, and present predictability concerns at different abstraction levels in embedded system design. First, we consider timing predictability of processor instruction sets. Thereafter, we consider how programming languages can be equipped with predictable timing semantics, covering both a language-based approach using the synchronous programming paradigm, as well as an environment that provides timing semantics for a mainstream programming language (in this case C). We present techniques for achieving timing predictability on multicores. Finally, we discuss how to handle predictability at the level of networked embedded systems where randomly occurring errors must be considered.