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ACM Transactions on Embedded Computing Systems (TECS)
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Multi-core processors are increasingly being considered as a means to provide the performance required by future safety-critical embedded systems. In this line, Aeroflex Gaisler has developed, in conjunction with the European Space Agency, the NGMP, a quad-core processor to be used in the future space missions of the Agency. Unfortunately, the use of multi-core processors in industrial domains is not straightforward since it poses various challenges on the timing behavior of the system. This is mainly due to the interferences tasks suffer when accessing hardware shared resources and which can affect their WCET. Although the effect of inter-task interferences in multi-core shared resources on real-time applications has received attention from academia, most of the solutions proposed require hardware changes. The lack of quantitative studies of the slowdown on applications' performance caused by inter-task interferences on real COTS multi-core processors, limit their use by industry. As a first step to understand the effect of inter-task interference in real COTS processors, this paper evaluates the timing predictability properties of the NGMP. In particular, we measure the maximum variation on tasks' execution time due to inter-task interferences accessing NGMP's shared hardware resources. To that end, we use a set of specialized micro-benchmarks designed to stress specific processor shared resources. The results of this can be useful for developing interference-aware WCET estimation methodologies and scheduling algorithms for real-time applications running on embedded multi-core processors.