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ACM Transactions on Embedded Computing Systems (TECS)
The case for the reduced instruction set computer
ACM SIGARCH Computer Architecture News
Giotto: A Time-Triggered Language for Embedded Programming
EMSOFT '01 Proceedings of the First International Workshop on Embedded Software
Reliable and Precise WCET Determination for a Real-Life Processor
EMSOFT '01 Proceedings of the First International Workshop on Embedded Software
Schedulability Analysis of Periodic Fixed Priority Systems
IEEE Transactions on Computers
Computer
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EUC'06 Proceedings of the 2006 international conference on Embedded and Ubiquitous Computing
Predictable programming on a precision timed architecture
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
An Automated Mapping of Timed Functional Specification to a Precision Timed Architecture
DS-RT '08 Proceedings of the 2008 12th IEEE/ACM International Symposium on Distributed Simulation and Real-Time Applications
Communications of the ACM - Security in the Browser
Game-theoretic timing analysis
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
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EURASIP Journal on Embedded Systems - FPGA supercomputing platforms, architectures, and techniques for accelerating computationally complex algorithms
Tight WCRT analysis of synchronous C programs
CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
A disruptive computer design idea: architectures with repeatable timing
ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
Proceedings of the 47th Design Automation Conference
SEUS'10 Proceedings of the 8th IFIP WG 10.2 international conference on Software technologies for embedded and ubiquitous systems
Ubiquitous verification of ubiquitous systems
SEUS'10 Proceedings of the 8th IFIP WG 10.2 international conference on Software technologies for embedded and ubiquitous systems
Branch target buffers: WCET analysis framework and timing predictability
Journal of Systems Architecture: the EUROMICRO Journal
PRET DRAM controller: bank privatization for predictability and temporal isolation
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Handling timing constraints violations in soft real-time applications as exceptions
Journal of Systems and Software
Quantitative analysis of software: challenges and recent advances (Invited Lecture)
FACS'10 Proceedings of the 7th international conference on Formal Aspects of Component Software
Worst-case execution time analysis-driven object cache design
Concurrency and Computation: Practice & Experience
Memory-centric scheduling for multicore hard real-time systems
Real-Time Systems
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ACM SIGBED Review - Special Issue on the 24th Euromicro Conference on Real-Time Systems
Building timing predictable embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
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Patterson and Ditzel [12] did not invent reduced instruction set computers (RISC) in 1980. Earlier computers all had reduced instruction sets. Instead, they argued that trends in computer architecture had gotten off the sweet spot, and that by dropping back a few years and forking a new version of architectures, leveraging what had been learned, they could get better computers by employing simpler instruction sets.