Modeling and analyzing real-time multiprocessor systems
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Reliability analysis for MPSoCs with mixed-critical, hard real-time constraints
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Stochastic response-time guarantee for non-preemptive, fixed-priority scheduling under errors
Proceedings of the 50th Annual Design Automation Conference
Probabilistic response time bound for CAN messages with arbitrary deadlines
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Building timing predictable embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
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Due to continuous technology downscaling modern embedded real-time systems become more and more susceptible to the occurrence of errors. The usage of appropriate countermeasures is necessary to prevent a system failure. In this paper we present a new reliability estimation technique for such systems. As a key novelty a formal analysis method will be introduced that approximates the probability of failure of a priority driven bus during a period of time, enabling fast and accurate reliability calculation. It removes the major drawbacks of existing approaches, e.g. random-based Monte-Carlo simulation that requires long runtimes. However Monte-Carlo simulation serves as reference method to demonstrate the accuracy of our approach by comparing analysis and simulation results. Finally we consider the design of mixed-criticality systems which combine different safety requirements on a single component.