An approach to symbolic timing verification
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Synthesis of application-specific multiprocessor systems including memory components
Journal of VLSI Signal Processing Systems - Special issue on application specific array processors (ASAP-92)
Retargetable self-test program generation using constraint logic programming
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
A co-synthesis approach to embedded system design automation
Design Automation for Embedded Systems
Advanced Computer Architecture: Parallelism,Scalability,Programmability
Advanced Computer Architecture: Parallelism,Scalability,Programmability
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
Specification and Design of Embedded Hardware-Software Systems
IEEE Design & Test
Design of an Optimal Loosely Coupled Heterogeneous Multiprocessor System
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Interface Timing Verification with Delay Correlation Using Constraint Logic Programming
EDTC '97 Proceedings of the 1997 European conference on Design and Test
DAC '98 Proceedings of the 35th annual Design Automation Conference
Synchronization detection for multi-process hierarchical synthesis
Proceedings of the 11th international symposium on System synthesis
Embedded system synthesis under memory constraints
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Scheduling with optimized communication for time-triggered embedded systems
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Integrated resource assignment and scheduling of task graphs using finite domain constraints
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Constraint analysis for code generation: basic techniques and applications in FACTS
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Allocation and scheduling of conditional task graph in hardware/software co-synthesis
Proceedings of the conference on Design, automation and test in Europe
Scheduling of conditional process graphs for the synthesis of embedded systems
Proceedings of the conference on Design, automation and test in Europe
A constructive algorithm for memory-aware task assignment and scheduling
Proceedings of the ninth international symposium on Hardware/software codesign
Constraints-driven scheduling and resource assignment
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Periodic Linear Programming with applications to real-time scheduling
Mathematical Structures in Computer Science
Quality-driven model-based architecture synthesis for real-time embedded SoCs
Journal of Systems Architecture: the EUROMICRO Journal
International Journal of Parallel Programming - Special Issue on Multiprocessor-based embedded systems
Analysis and optimisation of hierarchically scheduled multiprocessor embedded systems
International Journal of Parallel Programming - Special Issue on Multiprocessor-based embedded systems
Highly-cited ideas in system codesign and synthesis
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
Journal of Systems and Software
Modern development methods and tools for embedded reconfigurable systems: A survey
Integration, the VLSI Journal
Embedded Systems Design
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This paper presents an approach to embedded system synthesis which minimizes a system cost while implementing given timing requirements. The embedded system is represented by a set of finite domain constraints defining different requirements on processes timing, system resources and interprocess communication. The assignment of processes to processors and interprocess communications to buses as well as their scheduling are then defined as an optimization problem. A prototype system, based on constraint solving techniques, has been implemented in CHIP 5, the constraint logic programming system. Experimental results show that this approach can be efficiently used to define different system constraints and generate optimized system implementations.