Real Time Computing
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
A prototyping environment for hardware/software codesign in the COBRA project
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
An approach to the adaptation of estimated cost parameters in the COSYMA system
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
MILP based task mapping for heterogeneous multiprocessor systems
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Embedded system synthesis by timing constraints solving
ISSS '97 Proceedings of the 10th international symposium on System synthesis
Design space exploration algorithm for heterogeneous multi-processor embedded system design
DAC '98 Proceedings of the 35th annual Design Automation Conference
Embedded system synthesis under memory constraints
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Integrated resource assignment and scheduling of task graphs using finite domain constraints
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A constructive algorithm for memory-aware task assignment and scheduling
Proceedings of the ninth international symposium on Hardware/software codesign
Conditional scheduling for embedded systems using genetic list scheduling
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Readings in hardware/software co-design
Constraints-driven scheduling and resource assignment
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Interface Optimization During Hardware-Software Partitioning
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
A formal method for hardware IP design and integration under I/O and timing constraints
ACM Transactions on Embedded Computing Systems (TECS)
Quality-driven model-based architecture synthesis for real-time embedded SoCs
Journal of Systems Architecture: the EUROMICRO Journal
Modern development methods and tools for embedded reconfigurable systems: A survey
Integration, the VLSI Journal
An ILP formulation for task mapping and scheduling on multi-core architectures
Proceedings of the Conference on Design, Automation and Test in Europe
An optimal approach to the task allocation problem on hierarchical architectures
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
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This paper presents an approach for mapping tasks optimal to hardware and software components in order to design a real-time system. The tasks are derived from an algorithm and are represented by a task-graph. The performance of the algorithm on the resulting real- time system will meet the specified timing constraints. Some of the hardware components are programmable and others are application specific hardware processors. We propose a powerful MILP (Mixed Integer Linear Program) model with and without functional pipelining. The efficiency of the method is demonstrated with practical examples.