Design space exploration algorithm for heterogeneous multi-processor embedded system design

  • Authors:
  • Ireneusz Karkowski;Henk Corporaal

  • Affiliations:
  • Delft University of Technology, Information Technology and Systems, Mekelweg 4, 2628 CD Delft, The Netherlands;Delft University of Technology, Information Technology and Systems, Mekelweg 4, 2628 CD Delft, The Netherlands

  • Venue:
  • DAC '98 Proceedings of the 35th annual Design Automation Conference
  • Year:
  • 1998

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Abstract

Single-chip multi-processor embedded system becomesnowadays a feasible and very interesting option. What isneeded however is an environment that supports the designerin transforming an algorithmic specification into a suitableparallel implementation. In this paper we present anddemonstrate an important component of such an environment - an efficient design space exploration algorithm. The algorithm can be used to semi-automatically find the bestparallelization of a given embedded application. It employsfunctional pipelining [13] and data set partitioning [16]simultaneously with source-to-source program transformationsto obtain the most advantageous hierarchical parallelizations.