Design space exploration algorithm for heterogeneous multi-processor embedded system design
DAC '98 Proceedings of the 35th annual Design Automation Conference
Object-Distribution Analysis for Program Decomposition and Re-Clustering
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 13 - Volume 14
SPRINT: a tool to generate concurrent transaction-level models from sequential code
EURASIP Journal on Applied Signal Processing
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Practice shows that increasing the amount of instructionlevel parallelism offered by an architecture (like adding instructionslots to VLIW instructions) does not necessarylead to significant performance gains. Instead, high hardwarecosts and inefficient use of this hardware may occur.Mapping embedded applications onto multiprocessorsystems forms a very interesting extension to ILP. In thispaper we propose a functional pipelining approach to themapping of embedded programs written in ANSI C onto apipeline of application specific processors. Our novel functionalpipelining algorithm has low computational complexityand was especially developed to form the parallelizationengine of a (semi)-automatic system for multi-processorembedded system design. The paper explains theproposed algorithm and demonstrates its applicability.