SHARP-looking geometric partitioning

  • Authors:
  • S. Bapat;J. P. Cohoon

  • Affiliations:
  • University of Virginia, Charlottesville, VA;University of Virginia, Charlottesville, VA

  • Venue:
  • EURO-DAC '91 Proceedings of the conference on European design automation
  • Year:
  • 1991

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Abstract

A new technique, named SHARP, is presented for the partitioning of VLSI integrated circuits. SHARP is a hill-climbing heuristic that is designed to be incorporated into a partitioning-based placement algorithm. Its important features include a geometric decomposition of the layout surface into a '#'-shaped region; a multi-objective function that more accurately represents wire usage than the standard min-cut criterion, and extensive use of Steiner trees. A series of experiments demonstrates that the SHARP technique produces very high quality partitions.