Parallel logic level simulation of VLSI circuits

Authors:
Rajive Bagrodia;Zheng Li;Vikas Jha;Yuan Chen;Jason Cong
Affiliations:
Department of Computer Science, University of California, Los Angeles, CA;Department of Computer Science, University of California, Los Angeles, CA;Department of Computer Science, University of California, Los Angeles, CA;Department of Computer Science, University of California, Los Angeles, CA;Department of Computer Science, University of California, Los Angeles, CA
Venue:
WSC '94 Proceedings of the 26th conference on Winter simulation
Year:
1994

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Abstract