Optimal replication for min-cut partitioning

Optimizing resource utilization and testability using hot potato techniques

DAC '94 Proceedings of the 31st annual Design Automation Conference

Multi-way netlist partitioning into heterogeneous FPGAs and minimization of total device cost and interconnect

DAC '94 Proceedings of the 31st annual Design Automation Conference

Acyclic multi-way partitioning of Boolean networks

DAC '94 Proceedings of the 31st annual Design Automation Conference

A unified cost model for min-cut partitioning with replication applied to optimization of large heterogeneous FPGA partitions

EURO-DAC '94 Proceedings of the conference on European design automation

Multi-way system partitioning into a single type or multiple types of FPGAs

FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays

Multiple FPGA partitioning with performance optimization

FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays

New algorithms for min-cut replication in partitioned circuits

ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design

A gradient method on the initial partition of Fiduccia-Mattheyses algorithm

ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design

PROP: a recursive paradigm for area-efficient and performance oriented partitioning of large FPGA netlists

ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design

A hierarchical functional structuring and partitioning approach for multiple-FPGA implementations

Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design

Partitioning with cone structures

ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design

Performance-driven partitioning using retiming and replication

ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design

Architecture driven circuit partitioning

Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design

Multiway FPGA partitioning by fully exploiting design hierarchy

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Cell replication and redundancy elimination during placement for cycle time optimization

ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design

Circuit partitioning with coupled logic restructuring techniques

ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference

Timing optimization of FPGA placements by logic replication

Proceedings of the 40th annual Design Automation Conference