Circuit partitioning with coupled logic restructuring techniques

Communication based logic partitioning

EURO-DAC '92 Proceedings of the conference on European design automation

Perturb and simplify: multi-level boolean network optimizer

ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design

Multi-way netlist partitioning into heterogeneous FPGAs and minimization of total device cost and interconnect

DAC '94 Proceedings of the 31st annual Design Automation Conference

Layout driven logic synthesis for FPGAs

DAC '94 Proceedings of the 31st annual Design Automation Conference

Circuit partitioning with logic perturbation

ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design

Fast Boolean optimization by rewiring

Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design

A probabilistic multicommodity-flow solution to circuit clustering problems

ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design

Optimal replication for min-cut partitioning

ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design

SOCRATES: a system for automatically synthesizing and optimizing combinational logic

DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference

Recursive Learning: An Attractive Alternative to the Decision Tree for Test Genration in Digital Circuits

Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design

A linear-time heuristic for improving network partitions

DAC '82 Proceedings of the 19th Design Automation Conference

Perturb and simplify: multilevel Boolean network optimizer

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Postlayout logic restructuring using alternative wires

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems