Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
NOVA: state assignment of finite state machines for optimal two-level logic implementations
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
A linear-time heuristic for improving network partitions
DAC '82 Proceedings of the 19th Design Automation Conference
Circuit partitioning with logic perturbation
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
An algorithm for improving partitions of pin-limited multi-chip systems
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Further improve circuit partitioning using GBAW logic perturbation techniques
Proceedings of the conference on Design, automation and test in Europe
Circuit partitioning with coupled logic restructuring techniques
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Further improve circuit partitioning using GBAW logic perturbation techniques
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
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