A probabilistic multicommodity-flow solution to circuit clustering problems

Geometric embeddings for faster and better multi-way netlist partitioning

DAC '93 Proceedings of the 30th international Design Automation Conference

Spectral K-way ratio-cut partitioning and clustering

DAC '93 Proceedings of the 30th international Design Automation Conference

Multi-way VLSI circuit partitioning based on dual net representation

ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design

Acyclic multi-way partitioning of Boolean networks

DAC '94 Proceedings of the 31st annual Design Automation Conference

Logic partition orderings for multi-FPGA systems

FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays

Circuit partitioning with logic perturbation

ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design

Two Steiner tree packing problems

STOC '95 Proceedings of the twenty-seventh annual ACM symposium on Theory of computing

Area efficient pipelined pseudo-exhaustive testing with retiming

DAC '96 Proceedings of the 33rd annual Design Automation Conference

Efficient and effective placement for very large circuits

ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design

A timing driven N-way chip and multi-chip partitioner

ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design

Performance-driven partitioning using retiming and replication

ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design

Multicommodity max-flow min-cut theorems and their use in designing approximation algorithms

Journal of the ACM (JACM)

Further improve circuit partitioning using GBAW logic perturbation techniques

Proceedings of the conference on Design, automation and test in Europe

An effective general connectivity concept for clustering

Proceedings of the conference on Design, automation and test in Europe

Circuit partitioning with coupled logic restructuring techniques

ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference

A New Framework for Designing: Built-in Test Multichip Modules with Pipelined Test Strategy

IEEE Design & Test