Estimation of average switching activity in combinational and sequential circuits
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Journal of Computational Physics
How datapath allocation affects controller delay
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
Implicit Manipulation of Equivalence Classes Using Binary Decision Diagrams
ICCD '91 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
A linear-time heuristic for improving network partitions
DAC '82 Proceedings of the 19th Design Automation Conference
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This paper explores the influence of optimization along the boundary between hierarchically described components. A novel technique called repartitioning combines partitioning and sequential resynthesis of the design under various quality measures. It is applied to various digital circuits which consist of a controller and a datapath. The outcome of this effort is a versatile, parametrizable resynthesis tool which preserves this hierarchy. Due to the cost measures, an average improvement ranging between 5% and 15% was obtained.