Built-in test for VLSI: pseudorandom techniques
Built-in test for VLSI: pseudorandom techniques
SCOAP: Sandia controllability/observability analysis program
DAC '80 Proceedings of the 17th Design Automation Conference
A linear-time heuristic for improving network partitions
DAC '82 Proceedings of the 19th Design Automation Conference
An architecture level simulation methodology
ANSS '91 Proceedings of the 24th annual symposium on Simulation
A Fast and Robust Network Bisection Algorithm
IEEE Transactions on Computers
Circuit partitioning into small sets: a tool to support testing with further applications
EURO-DAC '91 Proceedings of the conference on European design automation
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A description is given of TEA (Test Engineer's Assistant), a CAD (computer-aided design) environment developed to provide the knowledge base and tools needed by a system designer for incorporating testability features into a design. TEA helps the designer meet the requirements of fault coverage and ambiguity group size. Fault coverage is defined as the percentage of faults that can be detected out of the population of all faults of a unit under test with a particular test set. An ambiguity group is defined as the smallest hardware entity in a given level of the system design hierarchy (that is, board, subsystem, and system) to which a fault can be isolated. The fault model considered throughout is the single stuck-at fault model. An example application of TEA is included.