VLSI circuit partitioning by cluster-removal using iterative improvement techniques
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Scheduling Divisible Loads in Parallel and Distributed Systems
Scheduling Divisible Loads in Parallel and Distributed Systems
A linear-time heuristic for improving network partitions
DAC '82 Proceedings of the 19th Design Automation Conference
Algorithms in c, part 5: graph algorithms, third edition
Algorithms in c, part 5: graph algorithms, third edition
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This paper shows methodology, which enables profiling macro data flow graphs (MDFG) that represent computation and communication patterns for the Finite Difference Time Domain (FDTD) problem in irregular computational areas. MDFG optimization is performed in three phases: simulation area partitioning with generation of initial MDFG, macro data nodes merging with static load balancing to obtain given number of macro nodes and communication optimization to minimize (balance) inter-node data transmissions, computational cells redeployment to take into account computational system restrictions. Efficiency of computations for several communication systems (MPI, RDMA RB, SHMEM) is discussed. Experimental results obtained by simulation are presented.