Multiple-Way Network Partitioning
IEEE Transactions on Computers
VLSI cell placement techniques
ACM Computing Surveys (CSUR)
Partitioning very large circuits using analytical placement techniques
DAC '94 Proceedings of the 31st annual Design Automation Conference
Genetic algorithms + data structures = evolution programs (3rd ed.)
Genetic algorithms + data structures = evolution programs (3rd ed.)
VLSI circuit partitioning by cluster-removal using iterative improvement techniques
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Multilevel hypergraph partitioning: application in VLSI domain
DAC '97 Proceedings of the 34th annual Design Automation Conference
Partitioning around roadblocks: tackling constraints with intermediate relaxations
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Clustering based simulated annealing for standard cell placement
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
A new approach to effective circuit clustering
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Automatic placement a review of current techniques (tutorial session)
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Genetic Algorithms in Search, Optimization and Machine Learning
Genetic Algorithms in Search, Optimization and Machine Learning
A linear-time heuristic for improving network partitions
DAC '82 Proceedings of the 19th Design Automation Conference
A hardware Memetic accelerator for VLSI circuit partitioning
Computers and Electrical Engineering
An enhanced memetic differential evolution in filter design for defect detection in paper production
Evolutionary Computation
Consensus fingerprint matching with genetically optimised approach
Pattern Recognition
Euro-Par'06 Proceedings of the 12th international conference on Parallel Processing
Fingerprint matching with an evolutionary approach
ICB'07 Proceedings of the 2007 international conference on Advances in Biometrics
Information Sciences: an International Journal
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Combining global and local search is a strategy used by many successful hybrid optimization approaches. Memetic Algorithms (MAs) are Evolutionary Algorithms (EAs) that apply some sort of local search to further improve the fitness of individuals in the population. Memetic Algorithms have been shown to be very effective in solving many hard combinatorial optimization problems. This paper provides a forum for identifying and exploring the key issues that affect the design and application of Memetic Algorithms. The approach combines a hierarchical design technique, Genetic Algorithms, constructive techniques and advanced local search to solve VLSI circuit layout in the form of circuit partitioning and placement. Results obtained indicate that Memetic Algorithms based on local search, clustering and good initial solutions improve solution quality on average by 35% for the VLSI circuit partitioning problem and 54% for the VLSI standard cell placement problem.