Performance-driven simultaneous place and route for row-based FPGAs

  • Authors:
  • Sudip K. Nag;Rob A. Rutenbar

  • Affiliations:
  • Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA;Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA

  • Venue:
  • DAC '94 Proceedings of the 31st annual Design Automation Conference
  • Year:
  • 1994

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Abstract