REAL: a program for REgister ALlocation
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Design control in a high level synthesis system
Euromicro 91 Proceedings of the seventeenth Euromicro conference on Software and hardware : specification and design: specification and design
Splicer: a heuristic approach to connectivity binding
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Algorithmic and Register-Transfer Level Synthesis: The System Architect's Workbench
Algorithmic and Register-Transfer Level Synthesis: The System Architect's Workbench
Chippe: a system for constraint driven behavioral synthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
The ADAM design planning engine
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Hardware/software partitioning with integrated hardware design space exploration
Proceedings of the conference on Design, automation and test in Europe
A unified approach for scheduling and allocation
Integration, the VLSI Journal
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