The combination of scheduling, allocation, and mapping in a single algorithm
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
The FSM network model for behavioral synthesis of control-dominated machines
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Increasing user interaction during high-level synthesis
MICRO 24 Proceedings of the 24th annual international symposium on Microarchitecture
Industrial extensions to university high level synthesis tools: Making it work in the real world
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Data-path synthesis using path analysis
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
The Princeton University behavioral synthesis system
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
High-level synthesis from VHDL with exact timing constraints
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Data path allocation using an extended binding model
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Flexible controlpath microarchitecture synthesis based on artificial intelligence
EURO-DAC '92 Proceedings of the conference on European design automation
Heuristics for branch-and-bound global allocation
EURO-DAC '92 Proceedings of the conference on European design automation
Computer
A high-performance microarchitecture with hardware-programmable functional units
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
EURO-DAC '94 Proceedings of the conference on European design automation
Rapid prototyping for DSP circuits using high level design tools
EURO-DAC '94 Proceedings of the conference on European design automation
High-level synthesis in an industrial environment
IBM Journal of Research and Development - Special issue: IBM CMOS technology
An exact methodology for scheduling in a 3D design space
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Array mapping in behavioral synthesis
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Clock-driven performance optimization in interactive behavioral synthesis
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Recent developments in high-level synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
How datapath allocation affects controller delay
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
An efficient representation for formal synthesis
ISSS '97 Proceedings of the 10th international symposium on System synthesis
Constraint analysis for DSP code generation
ISSS '97 Proceedings of the 10th international symposium on System synthesis
Limited exception modeling and its use in presynthesis optimizations
DAC '97 Proceedings of the 34th annual Design Automation Conference
Resource sharing in hierarchical synthesis
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Synchronization detection for multi-process hierarchical synthesis
Proceedings of the 11th international symposium on System synthesis
Incorporating multi-pass attribute grammars for the high-level synthesis of ASICs
SAC '98 Proceedings of the 1998 ACM symposium on Applied Computing
Unifying behavioral synthesis and physical design
Proceedings of the 37th Annual Design Automation Conference
Memory binding for performance optimization of control-flow intensive behaviors
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Cross-level hierarchical high-level synthesis
Proceedings of the conference on Design, automation and test in Europe
Architectural simulation in the context of behavioral synthesis
Proceedings of the conference on Design, automation and test in Europe
AGENDA: an attribute grammar driven enviornment for the design automation of digital systems
Proceedings of the conference on Design, automation and test in Europe
Automated Correctness Condition Generation for Formal Verification ofSynthesized RTL Designs
Formal Methods in System Design - Special issue on formal methods for computer-added design
Efficient integration of behavioral synthesis within existing design flows
ISSS '00 Proceedings of the 13th international symposium on System synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Synthesis and simulation of digital systems containing interacting hardware and software components
Readings in hardware/software co-design
IEEE Design & Test
A Model and Methodology for Hardware-Software Codesign
IEEE Design & Test
Introduction to High-Level Synthesis
IEEE Design & Test
Profile-Driven Behavioral Synthesis for Low-Power VLSI Systems
IEEE Design & Test
Net Scheduling in High-Level Synthesis
IEEE Design & Test
Specification and Validation of Control-Intensive IC's in hopCP
IEEE Transactions on Software Engineering
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
High-level synthesis of distributed logic-memory architectures
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Synchronous Controller Models for Synthesis from Communicating VHDL Processes
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
A Heuristic for Clock Selection in High-Level Synthesis
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Rethinking Behavioral Synthesis for a Better Integration within Existing Design Flows
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Synthesis of low-power selectively-clocked systems from high-level specification
ISSS '96 Proceedings of the 9th international symposium on System synthesis
A scheduling algorithm for optimization and early planning in high-level synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Memory binding for performance optimization of control-flow intensive behavioral descriptions
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Behavioral test generation using mixed integer non-linear programming
ITC'94 Proceedings of the 1994 international conference on Test
Facilitating the design of fault tolerance in transaction level systemc programs
ICDCN'12 Proceedings of the 13th international conference on Distributed Computing and Networking
Facilitating the design of fault tolerance in transaction level SystemC programs
Theoretical Computer Science
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