Embra: fast and flexible machine simulation
Proceedings of the 1996 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Continuous profiling: where have all the cycles gone?
ACM Transactions on Computer Systems (TOCS)
ProfileMe: hardware support for instruction-level profiling on out-of-order processors
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Energy-conscious HW/SW-partitioning of embedded systems: a case study on an MPEG-2 encoder
Proceedings of the 6th international workshop on Hardware/software codesign
A low power hardware/software partitioning approach for core-based embedded systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Hardware/software partitioning of embedded system in OCAPI-xl
Proceedings of the ninth international symposium on Hardware/software codesign
A self-optimizing embedded microprocessor using a loop table for low power
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
A fast on-chip profiler memory
Proceedings of the 39th annual Design Automation Conference
Image and Video Compression Standards: Algorithms and Architectures
Image and Video Compression Standards: Algorithms and Architectures
Algorithms, Complexity Analysis and VLSI Architectures for MPEG-4 Motion Estimation
Algorithms, Complexity Analysis and VLSI Architectures for MPEG-4 Motion Estimation
Complete Computer System Simulation: The SimOS Approach
IEEE Parallel & Distributed Technology: Systems & Technology
Asim: A Performance Model Framework
Computer
Hardware-Software Cosynthesis for Digital Systems
IEEE Design & Test
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
Computer
Hardware/software partitioning of software binaries
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Dynamic hardware/software partitioning: a first approach
Proceedings of the 40th annual Design Automation Conference
Gprof: A call graph execution profiler
SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
Catching Accurate Profiles in Hardware
HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
A Programmable Co-processor for Profiling
HPCA '01 Proceedings of the 7th International Symposium on High-Performance Computer Architecture
Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach
HPCA '02 Proceedings of the 8th International Symposium on High-Performance Computer Architecture
Two Case Studies in Latency Tolerant Architectures
Two Case Studies in Latency Tolerant Architectures
A Configurable Logic Architecture for Dynamic Hardware/Software Partitioning
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Comprehensive profiling support in the javaTM virtual machine
COOTS'99 Proceedings of the 5th conference on USENIX Conference on Object-Oriented Technologies & Systems - Volume 5
System-level design: orthogonalization of concerns and platform-based design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Low power data processing system with self-reconfigurable architecture
Journal of Systems Architecture: the EUROMICRO Journal
Proceedings of the conference on Design, automation and test in Europe
Leveraging reconfigurability in the hardware/software codesign process
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
| Hi-index | 0.00 |
In this paper, we present an efficient approach to HW/SW partitioning of applications targeted for embedded softcore SoPC and programmable logic. The methodology is based on the iterative performance analysis of the initial functional SW description and performance estimation of various HW/SW partitioning configurations. The main focus is on adequate profiling of arbitrary SW code regions (function or single instruction level) with clock-cycle accuracy without introducing additional execution overhead. In order to support the profiling for partitioning, we have developed the COMET Profiler tool. The performance analysis and estimation in the simulation and implementation domains are supported, necessitating no design and implementation of HW co-processing blocks for the partitioning evaluation. The design process is illustrated with two case studies.