High-level synthesis: introduction to chip and system design
High-level synthesis: introduction to chip and system design
Procedure exlining: a transformation for improved system and behavioral synthesis
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Procedure cloning: a transformation for improved system-level functional partitioning
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Partitioning sequential programs for CAD using a three-step approach
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Coordinated parallelizing compiler optimizations and high-level synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Rapid estimation of control delay from high-level specifications
Proceedings of the 43rd annual Design Automation Conference
Function Call Optimization for Efficient Behavioral Synthesis
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Techniques for minimizing and balancing I/O during functional partitioning
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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This paper proposes a behavioral level partitioning method for efficient behavioral synthesis from a large sequential program consisting of a set of functions. Our method optimally determines functions to be inlined into the main module and the other functions to be synthesized into sub modules in such a way that the overall datapath is minimized while the complexity of individual modules is lower than a certain level. The partitioning problem is formulated as an integer programming problem. Experimental results show the effectiveness of the proposed method.